J
José A. Sánchez-Durán
Researcher at University of Málaga
Publications - 22
Citations - 295
José A. Sánchez-Durán is an academic researcher from University of Málaga. The author has contributed to research in topics: Tactile sensor & Resistor. The author has an hindex of 9, co-authored 20 publications receiving 217 citations.
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Journal ArticleDOI
Three realizations and comparison of hardware for piezoresistive tactile sensors.
Fernando Vidal-Verdú,Óscar Oballe-Peinado,José A. Sánchez-Durán,Julián Castellanos-Ramos,Rafael Navas-Gonzalez +4 more
TL;DR: This paper presents an implementation of such an idea for a specific sensor based on standard microcontrollers, Programmable Systems on Chip (PSoCs) and Field Programmable Gate Arrays (FPGAs) and compares them.
Journal ArticleDOI
FPGA-Based Tactile Sensor Suite Electronics for Real-Time Embedded Processing
Óscar Oballe-Peinado,José A. Hidalgo-López,Julián Castellanos-Ramos,José A. Sánchez-Durán,Rafael Navas-Gonzalez,Jaime Herran,Fernando Vidal-Verdú +6 more
TL;DR: Electronics for a tactile sensor suite based on FPGAs that implements a direct interface with the raw sensor and serial communication between the fingertips and palm are presented.
Journal ArticleDOI
High-Accuracy Readout Electronics for Piezoresistive Tactile Sensors.
José A. Hidalgo-López,Óscar Oballe-Peinado,Julián Castellanos-Ramos,José A. Sánchez-Durán,Raquel Fernández-Ramos,Fernando Vidal-Verdú +5 more
TL;DR: Two reading methods that minimize errors resulting from crosstalk caused by the nonidealities of the array reading circuits are assessed by designing an electronic system for array reading, and the results are compared to those obtained using the traditional method.
Journal ArticleDOI
Accuracy and Resolution Analysis of a Direct Resistive Sensor Array to FPGA Interface
Óscar Oballe-Peinado,Fernando Vidal-Verdú,José A. Sánchez-Durán,Julián Castellanos-Ramos,José A. Hidalgo-López +4 more
TL;DR: This paper proposes a direct connection between an FPGA and a resistive array distributed in M rows and N columns, without the need of analog-to-digital converters to obtain resistance values in the sensor and where the conditioning circuit is reduced to the use of a capacitor in each of the columns of the matrix.
Journal ArticleDOI
Improved Circuits with Capacitive Feedback for Readout Resistive Sensor Arrays.
Óscar Oballe-Peinado,Fernando Vidal-Verdú,José A. Sánchez-Durán,Julián Castellanos-Ramos,José A. Hidalgo-López +4 more
TL;DR: Modifications of a previously reported circuit are proposed to reduce the errors due to the non-idealities of the amplifiers and the I/O drivers of the FPGA and calibration algorithms are derived from the analysis of the proposed circuitry to reduced the crosstalk error and improve the accuracy.