A Three Dimensional Structure (3DS) Memory (100) allows for physical separation of the memory circuits (103) and the control logic circuit (101) onto different layers (103) such that each layer may be separately optimized. One control logic circuit (101) suffices for several memory circuits (103), reducing cost. Fabrication of 3DS memory (100) involves thinning of the memory circuit (103) to less than 50 microns in thickness and bonding the circuit to a circuit stack while still in wafer substrate form. Fine-grain high density inter-layer vertical bus connections (105) are used. The 3DS memory (100) manufacturing method enables several performance and physical size efficiencies, and is implemented with established semiconductor processing techniques.

Three dimensional structure memory

A system, method, and computer program product for processing data are described herein. The system maintains first databases of patents, and second databases of non-patent information of interest to a corporate entity. The system also maintains one or more groups. Each of the groups comprises any number of the patents from the first databases. The system, upon receiving appropriate operator commands, automatically processes the patents in one of the groups in conjunction with non-patent information from the second databases. Accordingly, the system performs patent-centric and group-oriented processing of data. A group can also include any number of non-patent documents. The groups may be product based, person based, corporate entity based, or user-defined. Other types of groups are also covered, such as temporary groups. The processing automatically performed by the system relates to (but is not limited to) patent mapping, document mapping, patent citation (both forward and backward), patent aging, patent bracketing/clustering (both forward and backward), inventor patent count, inventor employment information, patent claim tree analysis, and finance. Other functions and capabilities are also covered, including the ability to utilize hyperbolic trees to visualize data generated by the system, method, and computer program product.

Using hyperbolic trees to visualize data generated by patent-centric and group-oriented data processing

The Vertical System Integration (VSI) invention herein is a method for integration of disparate electronic, optical and MEMS technologies into a single integrated circuit die or component and wherein the individual device layers used in the VSI fabrication processes are preferably previously fabricated components intended for generic multiple application use and not necessarily limited in its use to a specific application. The VSI method of integration lowers the cost difference between lower volume custom electronic products and high volume generic use electronic products by eliminating or reducing circuit design, layout, tooling and fabrication costs.

Vertical system integration

A radio frequency identification (RFID) tagging system for computer network assets comprises: an RFID host (22); a transponder tag (20) attached to an asset in a computer network, the tag having stored therein tag identifying data, inventory data describing the asset and security data; an electronically erasable and programmable memory (EEPROM) (18) adapted for operation as part of the asset (12); an RFID reader/writer (24) for reading data from the tag in an interrogation zone; respective communications links (26, 28) between the RFID host (22) and each one of the RFID reader/writer (24) and the asset (12), enabling the tag identifying data and the inventory or security data to be transferred between each of the RFID host (22), the EEPROM (18) and the tag (20), the inventory data also being stored in the EEPROM (18); and a control arrangement in the RFID host (22) and in the asset (12) for enabling operation of the asset (12) only in response to a predetermined communications sequence between the RFID host (22) and the asset (12) over the respective communications link.

RFID tagging system for network assets

A system and method for monitoring operating parameters of a machine (such as a vehicle) and producing diagnostic and/or prognostic results are disclosed. Active, semi-active, or semi-passive sensors are wirelessly linked with an interrogator that selectively interrogates the sensors, such as through transponders in wired communication with the sensors. A data concentrator or processor analyzes data from certain sensors and generates diagnostic/prognostic conclusions, in some cases using additional data selectively requested from and acquired by the sensors. In some embodiments, raw or abstracted data is communicated with a management center that provides troubleshooting information (again, possibly using additional, selectively acquired data), makes resource management decisions (such as preparing parts or labor resources to make a repair), and tracks problems in all or a subset of the machines being managed.

Diagnostics/prognostics using wireless links

An electrical device for logic circuits having a package comprising a combination of controlled collapse electrical interconnections, such as solder balls and pin through-hole conductors, wherein the conductors are disposed outside the perimeter of an inter-array of solder balls, which when a maximum number of solder balls are disposed, the array is circular in shape, so as to provide an increased footprint for the electrical device beyond that, otherwise maximum footprint for solder balls alone, which footprint is otherwise limited in size due to failures which occur in solder balls when solder balls are exposed to thermal and mechanical stress levels at extended distances from the neutral or zero stress point of the array.

Surface mount chip package having an array of solder ball contacts arranged in a circle and conductive pin contacts arranged outside the circular array

An electronic module includes multiple stacked bare IC chips ("a stack") and a sensor assembly that is mechanically coupled to an end surface of the stack. Electrical connection between the sensor assembly and the stack is provided by a metallization layer disposed on a side-surface of the stack. Specifically, wiring of the sensor assembly extends to an edge surface thereof corresponding to the side-surface of the stack where it electrically connects to the side-surface wiring. The IC chips of the stack are similarly electrically connected to the side-surface wiring. Multiple sensors (e.g., CCD arrays) may be electrically and mechanically coupled to multiple surfaces of the stack for providing a, e.g., multi-view imaging module. Multiple electrical and mechanical options exist for the connection of sensors to stacks within electronic modules.

Packaged electronic module and integral sensor array

Multi-view imaging apparatus

A flexible cable assembly for coupling an electronic apparatus, having a port for receiving personal computer cards in accordance with the PCMCIA standard, to at least one peripheral device, said flex cable assembly comprises a personal computer card connector, in accordance with the PCMCIA standard, for connecting into a corresponding port in the electronic apparatus, and a flexible cable connected to the personal computer card connector. The personal computer card connector also comprises an interface to said at least one peripheral device. In accordance with a further aspect of the invention, the flex cable assembly can also couple a first electronic apparatus, to a second electronic apparatus, each having a port for receiving personal computer cards in accordance with the PCMCIA standard. This flex cable assembly comprises (1) a first PCMCIA card connector for connecting into a corresponding port in either the first or second electronic apparatus; (2) a second PCMCIA card connector for connecting into a corresponding port in either the first or second electronic apparatus; and (3) a flex cable coupled between the first and second personal computer card connectors.

All flex PCMCIA-format cable

A thermoelectrically cooled integrated circuit package including an insulative module which defines a cavity, a thermoelectric cooler within the cavity, and an integrated circuit chip connected to the thermoelectric cooler, thus providing an integrated circuit package in which the integrated circuit package itself dissipates thermal energy generated by the integrated circuit chip.

Joseph Michael Mosley

Papers

Surface mount chip package having an array of solder ball contacts arranged in a circle and conductive pin contacts arranged outside the circular array

Packaged electronic module and integral sensor array

Multi-view imaging apparatus

All flex PCMCIA-format cable

Integrated thermoelectric cooling