The prospect of enhanced device performance from III–V materials has been recognized for at least 50 years, and yet, relative to the phenomenal size of the Si-based IC industry, these materials fulfilled only specific niches and were often referred to as “the material of the future” [1] . A key restriction enabling widespread use of III–V materials is the lack of a high quality, natural insulator for III–V substrates like that available for the SiO2/Si materials system [2] . The prospect of impending scaling challenges for technologies based on silicon metal oxide semiconductor field effect transistor (MOSFET) devices has brought renewed focus on the use of alternate surface channel materials from the III–V compound semiconductor family. The performance of the traditional MOSFET device structure is dominated by defects at the semiconductor/oxide interface, which in turn requires a high quality semiconductor surface. In this review, reflecting the authors’ current opinion, the recent progress in the understanding of the dielectric/III–V interface is summarized, particularly in regard to the interfacial chemistry that impacts the resultant electrical behavior observed. The first section summarizes the nature of the oxidation states of surface oxides on InxGa1−xAs. Then the atomic layer deposition of such oxides on the InxGa1−xAs surface is summarized in view of the interfacial chemical reactions employed. Finally the resultant electrical properties observed are examined, including the effects of substrate orientation. Portions of this review have been published previously [3] , [4] .

Interfacial chemistry of oxides on InxGa(1-x)As and implications for MOSFET applications

The electrical characteristics of n- and p-type gallium arsenide (GaAs) capacitors show a striking difference in the “accumulation” capacitance frequency dispersion. This difference has been attributed by some to a variation in the oxide growth, possibly due to photoelectrochemical properties of the two substrates. We show that the oxide growth on n- and p-type GaAs substrates is identical when exposed to identical environmental and chemical conditions while still maintaining the diverse electrical characteristics. The difference in electron and hole trap time constants is suggested as the source of the disparity of the frequency dispersion for n-type versus p-type GaAs devices.

Comparison of n-type and p-type GaAs oxide growth and its effects on frequency dispersion characteristics

Semiconductor surface passivation

This chapter reviews the interfacial chemistry observed for III-V semiconductors, with particular attention to native and deposited oxide gate dielectrics. The chemical states observed at the III-V surface as studied by x-ray photoelectron spectroscopy are presented, and the suppression of oxide formation with deposition techniques, particularly atomic layer deposition, is discussed. The resultant electrical properties of these interfaces are then reviewed, with attention to the interpretation of capacitance-voltage and related transistor measurements.

Interfacial Chemistry of Oxides on III-V Compound Semiconductors

The first proposed structure for an active semiconductor device appeared in 1930(1) and consisted of a three-terminal element where current control was exercised by means of a metal-semiconductor barrier. This device and a subsequently modified structure employing an aluminum oxide dielectric spacer(2) were unsuccessful because of an inability at that time to prepare an electrically suitable surface. Interestingly, both these devices were proposed using non-Si semiconductors and although they were notable failures initially, they have since, in somewhat modified form, appeared successfully as, what we now call, the Schottky-gate(3) and MOS(4) field-effect transistor, respectively. These devices were not pursued following their initial proposal because of the emergence in 1948 of silicon and germanium junction bipolar transistors(5–7) which, because of their relative ease of fabrication as well as their primary reliance on charge transport remote from a surface, were both fabricated and shown to operate with little developmental delay. Despite their higher-operating-temperature advantage, we now know that Si devices achieved their overwhelming preeminence primarily because of the excellent bulk and interfacial characteristics of silicon’s native thermal oxide, Sio2.(8) The significance of this one fact cannot be overstated when we consider the vast array of devices, circuits, and systems which rely for their operation on the fortuitous circumstance that Si has a good compatible dielectric.

K.H. Ziegler

Papers

Properties of anodic oxide films on n-type GaAs, GaAs0.6P0.4 and GaP