The invention comprises a method and apparatus for reducing uncertainty in timing on the network. The uncertainty in receive buffers is removed by time stamping the arriving packets before sending the packets to the receive buffer. The uncertainty in the transmission buffer is removed by giving the packets a timestamp in the future, and holding the packets until precisely that time. Time precision is ensured by only releasing time packets at the host physical layer to network boundary at the time specified within the packet.

Precise network time transfer

We have previously demonstrated that use of an appropriate dynamic voltage scaling (DVS) algorithm can lead to a substantial reduction in CPU power consumption in systems employing a time-triggered cooperative (TTC) scheduler. In this paper, we consider the impact that the use of DVS has on the levels of both clock and task jitter in TTC applications. We go on to describe a modified DVS algorithm (TTC-jDVS) which can be used where low jitter is an important design consideration. We then demonstrate the effectiveness of the modified algorithm on a data set made up of artificial tasks and in a realistic case study.

/pdf/reducing-jitter-in-embedded-systems-employing-a-time-2sv7evh07s.pdf

Reducing jitter in embedded systems employing a time-triggered software architecture and dynamic voltage scaling

This article presents an overview and some evaluation results of our PSynUTC 1 prototype system for GPS time distribution and time synchronization in Ethernetbased LANs. PSynUTC does not need dedicated GPS receivers at every computing node but uses ordinary data packets for disseminating time information. High accuracy is achieved by combining (1) hardware packet timestamping at the network interface of nodes and switches, (2) high-resolution, high-frequency adder-based clocks with superior adjustment capabilities, and (3) clock rate synchronization algorithms compensating typical TCXO drifts. Our technology can be employed with any network controller chipset that supports the media-independent interface (MII) standard. Moreover, standard device drivers and protocol stacks can be used without any change. Our evaluation results show that PSynUTC will achieve a worst case synchronization accuracy in the 100 ns range, which is an improvement of at least 4 orders of magnitude over conventional software-based approaches like NTP.

PSynUTC - Evaluation of a High Precision Time Synchronization Prototype System for Ethernet LANs

We study leader election in unidirectional rings of homonym processes that have no a priori knowledge on the number of processes. We show that message-terminating leader election is impossible for any class of rings Kk with bounded multiplicity k ≥ 2. However, we show that process-terminating leader election is possible in the sub-class U∗ ∩ Kk, where U∗ is the class of rings which contain a process with a unique label.

Stabilization, Safety, and Security of Distributed Systems

: This paper shows how to distribute GPS-time with micro-accuracy and below even in Ethernet-based distributed systems. Our SynUTC-approach is based upon a simple network controller-level hardware for timestamping data packets as they leave and arrive at a node, which comes in two flavors: The memory-based times-tamping method exploited by our Network Time Interface (NTI) M-Module timestamps data packets as the network controller accesses them in memory. This technique can be used for virtually any type of network and network controllers. For 10 Mb/s Ethernet, for example, our experimental evaluation revealed a time distribution accuracy down to the pus-range.

How to Distribute GPS-Time Over COTS-Based LANs

We propose a fault-tolerant algorithm for synchronizing both state and rate of clocks in a distributed system. This algorithm is based on rounds, uses our fault-tolerant optimal precision (OF) convergence function as the means of synchronization, and maintains a collection of intervals to keep track of real-time, internal global time, and clock rates. The analysis shows that the interlocking between state and rate synchronization can be easily solved, and that oscillator stabilities together with the transmission delay uncertainties of packets predominate the internal synchronization. In addition, average case results gathered from simulation experiments with our SimUTC toolkit prove to be about one order of magnitude better than the worst case ones from the analysis of our state & rate algorithm.

K. Schossmaier

Papers

An algorithm for fault-tolerant clock state & rate synchronization