A highly stable triple-integration noise-shaping technology which permits greater accuracy for monolithic audio A/D converters is discussed. Based on this technology, a 16-bit 24-kHz bandwidth A-D converter LSI with digital filters was successfully fabricated in 2-/spl mu/m CMOS technology. An SNR (S/(N+THD)) of 91 dB and a total harmonic distortion (THD) of 0.002% at full-scale input were attained.

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A 16-bit oversampling A-to-D conversion technology using triple-integration noise shaping

Computer simulations are used to determine the stability limits of single-bit delta-sigma modulators up to order 8. It is found that none of the existing criteria for stability are adequate for design. Plots of the maximum signal-to-noise ratio (SNR) achievable with a given modulator order and oversampling ratio (OSR) are presented. These graphs can be used to determine the modulator order and OSR required to achieve a given SNR or to check the tightness of (as yet unavailable) theoretical bounds. >

An empirical study of high-order single-bit delta-sigma modulators

A system and method for configuring an instrument to perform measurement functions, wherein the instrument includes a programmable hardware element. A graphical program is first created, wherein the graphical program implements a measurement function. The graphical program may include a front panel and a block diagram. The method then generates a hardware description based on at least a portion of the graphical program. The hardware description describes a hardware implementation of the at least a portion of the graphical program. The method then configures the programmable hardware element in the instrument utilizing the hardware description to produce a configured hardware element. The configured hardware element thus implements a hardware implementation of the at least a portion of the graphical program. The instrument then acquires a signal from an external source, and the programmable hardware element in the instrument executes to perform the measurement function on the signal. The front panel may be used by a user to control the instrument during the measurement.

System and method for configuring an instrument to perform measurement functions utilizing conversion of graphical programs into hardware implementations

A topology for high-precision noise-shaping converters that can be integrated on a standard digital IC process is presented. This topology uses a multibit noise-shaping coder and a novel form of dynamic element matching to achieve high accuracy and long-term stability without requiring precision matching of components. A fourth-order noise-shaping D/A (digital-to-analog) conversion system using a 3-b quantizer and a dynamic element-matching internal D/A converter, fabricated in a standard double-metal 3- mu m CMOS process, achieved 16-bit dynamic range and a harmonic distortion below -90 dB. This multibit noise-shaping D/A conversion system achieved performance comparable to that of a 1-bit noise-shaping D/A conversion system that operated at nearly four times its clock rate. >

A noise-shaping coder topology for 15+ bit converters

This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion [7], followed by an additive noise source representing distortion components. In the paper, input signal amplitude dependencies of delta-sigma modulator stability and signal-to-noise ratio are analyzed. It is shown that due to the nonlinearity of the quantizer, the signal-to-noise ratio of the modulator may decrease as the input amplitude increases prior to saturation. Also, a stable third-order delta-sigma modulator may become unstable by increasing the input amplitude beyond a certain threshold. Both of these phenomena are explained by the nonlinear analysis of this paper. The analysis is carried out for both dc and sinusoidal excitations.

/pdf/an-analysis-of-nonlinear-behavior-in-delta-sigma-modulators-43rb1chldv.pdf

An analysis of nonlinear behavior in delta - sigma modulators

The paper presents a design methodology based on correspondence between performance requirements, mathematical parameters, and circuit parameters of a sigma-delta modulator. This methodology will guide a design engineer in selecting the circuit parameters based on system requirements, in translating paper design directly into LSI design, in predicting the effect of component sensitivity, and in analyzing the operations of the sigma-delta modulator. The sigma-delta modulator is viewed as a device which distributes the noise power, determined by peak SNR, over a much broader band, compared to signal bandwidth, shapes and amplifies it, and allows filtering of the out-of-band noise. The shaping and amplification are quantified by two parameters, F and P , whose product is analogous to the square of step size of a uniform coder. These two parameters are related, on one hand, to the time constants or location of zero and poles. On the other hand, inequalities are set up between performance parameters, like signal-to-noise ratio and dynamic range, and F and P .

K. Shenoi

Papers

Design Methodology for ΣΔM

K. Shenoi

Papers

Design Methodology for &#931;&#916;M

Design Methodology for ΣΔM