This survey presents an overview of recent advances in the state of the art for computer-aided design (CAD) tools for analog and mixed-signal integrated circuits (ICs). Analog blocks typically constitute only a small fraction of the components on mixed-signal ICs and emerging systems-on-a-chip (SoC) designs. But due to the increasing levels of integration available in silicon technology and the growing requirement for digital systems to communicate with the continuous-valued external world, there is a growing need for CAD tools that increase the design productivity and improve the quality of analog integrated circuits. This paper describes the motivation and evolution of these tools and outlines progress on the various design problems involved: simulation and modeling, symbolic analysis, synthesis and optimization, layout generation, yield analysis and design centering, and test. This paper summarizes the problems for which viable solutions are emerging and those which are still unsolved.

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Computer-aided design of analog and mixed-signal integrated circuits

High-frequency alternating current (AC) waveforms have been shown to produce a quickly reversible nerve block in animal models, but the parameters and mechanism of this block are not well understood. A frog sciatic nerve/gastrocnemius muscle preparation was used to examine the parameters for nerve conduction block in vivo, and a computer simulation of the nerve membrane was used to identify the mechanism for block. The results indicated that a 100% block of motor activity can be accomplished with a variety of waveform parameters, including sinusoidal and rectangular waveforms at frequencies from 2 kHz to 20 kHz. A complete and reversible block was achieved in 34 out of 34 nerve preparations tested. The most efficient waveform for conduction block was a 3-5 kHz constant-current biphasic sinusoid, where block could be achieved with stimulus levels as low as 0.01 microCphase(-1). It was demonstrated that the block was not produced indirectly through fatigue. Computer simulation of high-frequency AC demonstrated a steady-state depolarisation of the nerve membrane, and it is hypothesised that the conduction block was due to this tonic depolarisation. The precise relationship between the steady-state depolarisation and the conduction block requires further analysis. The results of this study demonstrated that high-frequency AC can be used to produce a fast-acting, and quickly reversible nerve conduction block that may have multiple applications in the treatment of unwanted neural activity.

Nerve conduction block utilising high-frequency alternating current.

Traditionally, work on analog testing has focused on diagnosing faults in board designs. Recently, with increasing levels of integration, not just diagnosing faults, but distinguishing between faulty and good circuits has become a problem. Analog blocks embedded in digital systems may not easily be separately testable. Consequently, many papers have been recently written proposing techniques to reduce the burden of testing analog and mined-signal circuits. This survey attempts to outline some of this recent work, ranging from tools for simulation-based test set development and optimization to built-in self-test (BIST) circuitry.

A tutorial introduction to research on analog and mixed-signal circuit testing

The invention provides an implant, system and method for electrically stimulating a target tissue to either activate or block neural impulses. The implant provides a conductive pathway for a portion of electrical current flowing between surface electrodes positioned on the skin and transmits that current to the target tissue. The implant has a passive electrical conductor of sufficient length to extend from subcutaneous tissue located below a surface cathodic electrode to the target tissue. The conductor has a pick-up end which forms an electrical termination having a sufficient surface area to allow a sufficient portion of the electrical current to flow through the conductor, in preference to flowing through body tissue between the surface electrodes, such that the target tissue is stimulated to either activate or block neural impulses. The conductor also has a stimulating end which forms an electrical termination for delivering the current to the target body tissue.

Method of routing electrical current to bodily tissues via implanted passive conductors

The IEEE Mixed-Signal Technical Activity Committee is developing a common set of benchmark circuits for use in researching and evaluating analog fault modeling, test generation, design-for-test, and built-in selj-test methodologies. The firm release circuits are based on MITEL Semiconductor's 1.S pm and' 1.2 pm CMOS technologies and they will allow engineers and' researchers working in analog and mixed- signal testing to com- pare test results as is done in the digital domain. This paper pre- sents a set of typical circuits described by netlists in HSPICE format. Schematic diagrams, simulation resu1t.r and measured' results, if available, are provided together with lajout and a typical test environment. The full details are available on the web page dedicated to analog and mixed-signal benchmark. I. INTRODUCTION Two trends in the electronic industry have dramatically boosted the importance of analog circuitry, moving it more into mainstream IC design. First, as gate lengths continue to shrnnk with deep submicron dimensions, system designers want to pack most or even all of a system's c,apabilities onto a single piece of silicon. So what were once discrete analog functions are now a subsection of large, primarily digital, application-specific ICs (ASICs). These mixed-signal devices, containing both analog and digital functionality, are the fastest growing segment of the IC markei. - design starts for mixed-signal ICs are increasing by a robust 29% a year (l). The second trend is the convergence of audio, computational, communication, and graphical capabilities across the electronic industry. Blending all this audio, video and telecommunications with standard digital functionality requires mixed-signal designs. For example, today's advanced digital cellular phones can display messages and deliver unparalleled audio performance. Or take personal computers. They are now multimedia powerhouses, with high-quality sound, video and telecommunications unthinkable just a few years ago. Moreover consumer games are fast approaching arcade quality in their advanced 3-D graphics and outstanding sound. So, it is no surprise that the Dataquest research numbers predict the hottest growth areas for mixed-signal ICs to be in telecommunications, automotive, consumer and computer peripherals. These two trends in the design industry (the rise of system-on-silicon and the growing pervasiveness of multimedia) are feeding on each other, resulting in the phenomenal growth in mixed-signal ICs. On the one hand, the emergence of mixed-signal IC design has fueled the growth in multimedia products. Conversely, the drive for audio and video capabilities in a broad range of products has compelled the design community to pack both analog and digital functionality on a single chip to stay competitive in cost and performance. Advances in deep submicron technologies have fueled the explosive increase in IC complexity, but smaller gate lengths make these chips much more sensitive to fabrication variations and tolerance accumulations. This is especially true for mixed-signal designs, with their process-sensitive analog circuitry. Consequently, ICs are increasingly not meeting specifications. Although there is a growing need for tighter quality controls, higher gate counts make these ICs difficult to simulate, analyze and test in a reasonable time. Incomplete simulation and testing directly leads to an increase in field returns - a situation any IC designer wants to avoid at all costs. To improve testing capabilities, the Mixed-Signal Testing Committee has concentrated on providing analog and mixed- signal benchmark circuits as is done in the digital domain. The objectives are twofold: 1) to have circuits for performance comparison and validation for test, DIT, and BIST methodologies and 2) to develop robust designs which can be used for design purposes. This will allow comparison of results in fault modelling, test generation, and other related areas. The intention behind creating the benchmark database relates to the availability of the common references, to the accessibility to the standard solutions and typical performances, and, finally, to the possibility of validating new ideas with the existing database. Beside the help which the benchmark circuits bring to the research community, the circuitry can be seen to have educational value to the less experienced engineers and those who are just at the beginning of their analog career. The first release contains a small portion of the typical analog and mixed-signal circuits. We plan to extend the benchmark list by other types of circuits and by other designs from already included categories. Building this library will take some time but we believe that it is the effort which will help in achieving further advances in the area of mixed- signal testing and design-for-test. The important enabling factor came from MITEL Semiconductor which allowed the use of the 1.2-um and 1.5-um CMOS technology parameters for the benchmark development. Following our call for participation the first group of volunteers from academia and

Analog and Mixed-Signal Be:nchmark Circuits - First Release

The IEEE Mixed-Signal Technical Activity Committee is developing a common set of benchmark circuits for use in researching and evaluating analog fault modeling, test generation, design-for-test, and built-in self-test methodologies. The first release circuits are based on MITEL Semiconductor's 1.5 /spl mu/m and 1.2 /spl mu/m CMOS technologies and they will allow engineers and researchers working in analog and mixed-signal testing to compare test results as is done in the digital domain. This paper presents a set of typical circuits described by netlists in HSPICE format. Schematic diagrams, simulation results and measured results, if available, are provided together with layout and a typical test environment. The full details are available on the web page dedicated to analog and mixed-signal benchmarks.

Analog and mixed-signal benchmark circuits-first release

A new low-cost test method for analog integrated circuits, called oscillation-test, is presented. During the test mode, the circuit under test (CUT) is converted to a circuit that oscillates. Faults in the CUT which cause a reasonable deviation of the oscillation frequency from its nominal value can be detected. Using this test method, no test vector is required to be applied. Therefore, the test vector generation problem is eliminated and the test time is very small because a limited number of oscillation frequencies is evaluated for each CUT. Due to its digital nature, the oscillation frequency can be easily interfaced to boundary scan. This characteristics imply that oscillation-test strategy is very attractive for wafer-probe testing as well as final production testing. In this paper, the validity of the proposed test method has been verified throughout some examples such as operational amplifiers and analog-to-digital converter (ADC).

Oscillation-test strategy for analog and mixed-signal integrated circuits

A new low-cost test method for analog integrated circuits, called the oscillation test, is presented. During the test mode, the circuit under test (CUT) is converted to a circuit that oscillates. Faults in the CUT which deviate the oscillation frequency from its tolerance band can be detected. Using this test method, no test vector is required to be applied. Therefore, the test vector generation problem is eliminated, and the test time is very small because only a single output frequency is evaluated for each CUT. The oscillation frequency may be considered as a digital signal and therefore can be evaluated using pure digital circuitry. These characteristics imply that the oscillation-test strategy is very attractive for wafer-probe testing as well as final production testing. In this note, the validity of the proposed test method has been verified throughout various examples such as operational amplifiers, amplifiers, filters, and analog-to-digital converters (ADCs). The simulations and practical implementation results affirm that the presented method assures a high fault coverage.

Testing analog and mixed-signal integrated circuits using oscillation-test method

This paper describes a new built-in self test (BIST) technique suitable for both functional and structural testing of analog and mixed-signal circuits based on the oscillation-test methodology. Analog-to-digital converter (ADC) is used as a test vehicle to demonstrate the capability of the proposed OBIST technique for both functional and structural testing. Design of different parts of OBIST structure is also presented. The ADC conversion rate, differential nonlinearity (DNL) and integral nonlinearity (INL) at each quantization band edge (QBE) are tested as functional parameters. These parameters are considered to be the most important functional characteristics of an ADC. Practical experimentation using real-world successive approximation and flash ADCs confirms the accuracy of OBIST for functional testing of ADCs. Simulation results using a 3-bit flash ADC designed using a CMOS 1.2 /spl mu/m technology are also presented. For structural testing, oversampled sigma-delta ADCs are investigated. Both hard and soft faults are considered and some simulation results are presented.

Oscillation built-in self test (OBIST) scheme for functional and structural testing of analog and mixed-signal integrated circuits

The oscillation-test strategy is a low cost and robust test method for mixed-signal integrated circuits. Being a vectorless test method, it allows one to eliminate the analog test vector generator. Furthermore, as the oscillation frequency is considered to be digital, it can be precisely analyzed using pure digital circuitry and can be easily interfaced to test techniques dedicated to the digital part of the circuit under test (CUT). This paper describes the design for testability (DFT) of active analog filters based on oscillation-test methodology. Active filters are transformed to oscillators using very simple techniques. The tolerance band of the oscillation frequency is determined by a Monte Carlo analysis taking into account the nominal tolerance of all circuit under test components. Discrete practical realizations and extensive simulations based on CMOS 1.2 /spl mu/m technology parameters affirm that the test technique presented for active analog filters ensures high fault coverage and requires a negligible area overhead. Finally, the DFT techniques investigated are very suitable for automatic testable filter synthesis and can be easily integrated in the tools dedicated to automatic filter design.

Karim Arabi

Papers

Analog and mixed-signal benchmark circuits-first release

Oscillation-test strategy for analog and mixed-signal integrated circuits

Testing analog and mixed-signal integrated circuits using oscillation-test method

Oscillation built-in self test (OBIST) scheme for functional and structural testing of analog and mixed-signal integrated circuits

Oscillation-test methodology for low-cost testing of active analog filters