A field plate structure is provided to terminate the electrode of a semiconductor device in a manner to reduce curvature of electric field within the body of the semiconductor device underlying the electrode and surrounding the electrode. A stepped electrode outer rim is provided in effect through the use of an underlying polysilicon which drapes over an underlying oxide. The main contact metal, typically aluminum, overlies the polysilicon but is upwardly displaced above the relatively thin polysilicon by a relatively thick oxide layer over the polysilicon. The composite effect of the thin polysilicon layer at one level and the heavier metallizing at a higher level but overlapping the polysilicon is that of a metal electrode deposited atop an insulation layer having two steps therein.

Composite metal and polysilicon field plate structure for high voltage semiconductor devices

A precisely formed region of semiconductor material which correspondingly contains a precisely controlled amount of charge when depleted is provided in the proximity of a p-n junction in several kinds of semiconductor devices. This region is located within the selected semiconductor device in such a manner as to increase avalanche breakdown voltage of a p-n junction to near its ideal value and to reduce both peak bulk and peak surface electric fields.

High breakdown voltage semiconductor device

At least one annular region (11,12, . . . ) extends around an active device region (10) and is located within the spread of a depletion layer (25) from a reverse-biased p-n junction (20) formed by the device region (10) to increase the breakdown voltage of the junction (20). The device region (10) and/or at least one inner annular region (11,12, . . . ) includes at least one shallower portion (10b,11b, . . . ) which extends laterally outwards from a deep portion (10a,11a,12a, . . . ) and faces the surrounding annular region to change the spacing and depth relationship of these regions. This permits high punch-through voltages to be achieved between the regions (10,11,12, . . . ) while reducing peak fields at the bottom outer corners of the regions (10,11,12, . . . ). Inwardly-extending shallow portions (11c,12c, . . . ) may also be included. The shallow portions (10b,11b,11c,12c . . . ) may extend around the whole of a perimeter of the region or be localized where higher electrostatic fields may occur around the perimeter.

High voltage guard ring with variable width shallow portion

A planar pn-junction with high electric strength, which separates a semiconductor region inserted in a semiconductor body from the rest of the semiconductor body, has, in its border region, a plurality of field plates which are separated from a semiconductor zone residing below and extending the semiconductor region by an electrically insulating layer. The field plates contact the semiconductor zone in the area of contact holes. The contact holes respectively have set distances between them and the inner and outer field plate edges, whereby below those field plate parts residing between the contact holes and the inner field plates borders, local doping maxima of the semiconductor zone are provided.

Planar pn-junction of high electric strength

In order to increase the breakdown voltage of a reverse-biased p-n junction of a semiconductor device, at least three annular regions which extend around the active device region are located within the spread of a depletion layer from the junction. At least one inner annular region is wider than outer annular regions, and this increased width of the inner region or regions reduces peak electrostatic fields found to occur at the bottom outer corners of the active device region and inner annular regions. The spacing of the annular regions increases with remoteness from the active device region, although at least two inner annular regions may have the same spacing as that of the innermost annular region from the active device region. A group of annular regions may have the same width as each other in the group.

Breakdown voltage increasing device with multiple floating annular guard rings of decreasing lateral width

A semiconductor device is provided having at least two semiconductor regions of opposite conductivity type and forming a planar-type PN junction. A field limiting ring is disposed spaced from the PN junction. A high-resistivity polycrystalline silicon layer covers the PN junction and the field limiting ring.

Semiconductor device with a high breakdown voltage characteristic

A semiconductor integrated circuit, in which an isolation region with one conductivity type and a plurality of island regions with another conductivity type separated by the isolation region are provided, is disclosed. In this case, a high resistance polycrystalline semiconductor layer is formed to cover whole of a surface portion of a PN-junction formed between the isolation region and the island regions.

Semiconductor integrated circuit

PROBLEM TO BE SOLVED: To resolve a problem that since periphery P-type isolation diffusion makes a P-type diffusion layer connected from the adverse side and the back side over the whole thickness of a chip, extremely long time is required for diffusion, productivity is bad, and moreover, increase of a factory area for a lot of diffusion furnaces and installation of these is caused. SOLUTION: P-type isolation diffusion 5 in the periphery of a conventional chip are not connected with each other from the adverse side and the back side. An isolation electrode 11 is formed. An N region between them are connected by a depletion layer when voltage is applied. By this procedure, isolation is implemented. Means such as a guard ring for softening an electric field on the adverse side and the back side is used effectively. This makes it possible not only to shorten diffusion time, but also to make isolation diffusion and main diffusion reduced to one diffusion. COPYRIGHT: (C)2005,JPO&NCIPI

Structure of bidirectional block type planar device and method of manufacturing the same

Halbleiterstruktur mit schutzschicht

PURPOSE:By using a semi-insulatijing film as semiconductor surface protecting film, a stable protecting film is obtained that it has no effect to the semiconductor surface since the characteristic of the semiconductor is unaltered and the external electric filed is neutralized by movable electric changes within the film

Kawana Yoshiyuki

Papers

Semiconductor device with a high breakdown voltage characteristic

Semiconductor integrated circuit

Structure of bidirectional block type planar device and method of manufacturing the same

Halbleiterstruktur mit schutzschicht

A semiconductor device