K
Kazuyuki Sugahara
Researcher at Mitsubishi
Publications - 48
Citations - 750
Kazuyuki Sugahara is an academic researcher from Mitsubishi. The author has contributed to research in topics: Semiconductor device & Layer (electronics). The author has an hindex of 13, co-authored 48 publications receiving 750 citations.
Papers
More filters
Patent
Stacked-type semiconductor device
TL;DR: In this article, a method of manufacturing a stacked-type semiconductor device is presented. But the method is limited to a single semiconductor substrate and is not suitable for the case of multiple semiconductor substrates.
Patent
Vertical type MOS transistor and method of formation thereof
TL;DR: In this article, a vertical MOS transistor has been shown to have its channel length determined by the thickness of an insulating layer provided over a semiconductor substrate, rather than by the depth of a trench in which the transistor is formed.
Patent
Method of manufacturing a semiconductor device
TL;DR: In this paper, an epitaxial semiconductor layer of at least 2 mu m in thickness, having excellent reproducibility and good crystallinity, is formed on a residual semiconductor on the dielectric layer, to serve as a region for forming semiconductor elements.
Patent
Zone melting apparatus for monocrystallizing semiconductor layer on insulator layer
TL;DR: In this article, an upper elongated heater for zone melting of the semiconductor layer, the upper heater being disposed above and parallel to the semiconducting layer, a plurality of lower elongated heaters for heating the whole layered substance, the lower heaters being disposed in a plane below and parallel with the layered substance and the axis of each lower heater being substantially perpendicular to the axis for the upper heating unit, one or more temperature sensors for estimating the temperature of the layered material.
Patent
Stacked semiconductor device
TL;DR: In this paper, a stacked semiconductor device includes a first integrated circuit formed on the principal surface of a semiconductor layer and containing active elements, and a second integrated circuit created by an insulation layer.