More than a decade of research in the field of thermal, motion, vibration and electromagnetic radiation energy harvesting has yielded increasing power output and smaller embodiments. Power management circuits for rectification and DC-DC conversion are becoming able to efficiently convert the power from these energy harvesters. This paper summarizes recent energy harvesting results and their power management circuits.

Micropower energy harvesting

Integrated low-frequency oscillators can replace crystal oscillators as sleep-mode timers to reduce the size and cost of wireless sensors [1]. Since the timer is one of the few continuously functioning circuits, minimizing its power consumption can greatly reduce sleep-mode power of highly duty-cycled systems. Temperature stability of the oscillator is important in order to minimize timing uncertainly and guard time for the radios, and thus maximizing sleep time. The voltage-averaging feedback method described in [2] achieves high stability in the MHz frequencies, but when scaled to the kHz range, requires very large filters. On the other extreme, gate leakage-based timers have been designed for sub-nW power consumption, but operate in the sub-Hz frequencies [3]. In the past, high accuracy RC oscillators in the kHz range have been designed with feed-forward correction [1] and self-chopped operation [4]. In this work, an offset cancellation architecture achieves long-term frequency stability and temperature stability while operating at lower power.

A 120nW 18.5kHz RC oscillator with comparator offset cancellation for ±0.25% temperature stability

A fully-integrated 18.5 kHz RC time-constant-based oscillator is designed in 65 nm CMOS for sleep-mode timers in wireless sensors. A comparator offset cancellation scheme achieves $4\times $ to $25\times $ temperature stability improvement, leading to an accuracy of ±0.18% to ±0.55% over −40 to 90 °C. Sub-threshold operation and low-swing oscillations result in ultra-low power consumption of 130 nW. The architecture also provides timing noise suppression, leading to $10\times $ reduction in long-term Allan deviation. It is measured to have a stability of 20 ppm or better for measurement intervals over 0.5 s. The oscillator also has a fast startup-time, with the period settling in 4 cycles.

An RC Oscillator With Comparator Offset Cancellation

In wireless networks with a low duty cycle, the radio is operational for only a small percentage of the time. A sleep timer is used to synchronize the data transmission and reception. The total system power is then limited by the sleep power and the sleep timer frequency stability. Low-frequency crystal oscillators are a common choice for sleep timers due to their excellent long-term stability, frequency stability over temperature, and very low power consumption. However, the external crystal cost and board area are undesired. If an integrated oscillator is used as an alternative, the frequency variation must be minimized so the sleep time can be maximized.

17.8 A 190nW 33kHz RC oscillator with ±0.21% temperature stability and 4ppm long-term stability

This work presents a sub- $\mu \text {W}$ on-chip oscillator for fully integrated system-on-chip designs. The proposed oscillator introduces a resistive frequency locked loop topology for accurate clock generation. In this topology, a switched-capacitor circuit is controlled by an internal voltage-controlled oscillator (VCO), and the equivalent resistance of this switched-capacitor is matched to a temperature-compensated on-chip resistor using an ultra-low power amplifier. This design yields a temperature-compensated frequency from the internal VCO. The approach eliminates the traditional comparator from the oscillation loop; this comparator typically consumes a significant portion of the total oscillator power and limits temperature stability in conventional RC relaxation oscillators due to its temperature-dependent delay. A test chip is fabricated in $0.18~\mu \text {m}$ CMOS that exhibits a temperature coefficient of 34.3 ppm/°C with long-term stability of less than 7 ppm (12 second integration time) while consuming 110 nW at 70.4 kHz. A radio transmitter circuit that uses the proposed oscillator as a baseband timing source is also presented to demonstrate a system-on-chip design using this oscillator.

A 110 nW Resistive Frequency Locked On-Chip Oscillator with 34.3 ppm/°C Temperature Stability for System-on-Chip Designs

A sub-μW, 1-cycle start-up CMOS relaxation oscillator has been developed with a feedforward period control scheme and a digitally-controlled boost charging technique. The oscillator is implemented in 90nm CMOS and we sucessfuly have demonstrated 100kHz clock generation with ±1%-accuracy and an extremely low power consumption of 280nW.

A 280nW, 100kHz, 1-cycle start-up time, on-chip CMOS relaxation oscillator employing a feedforward period control scheme

There is a problem in the prior semiconductor devices that energy recovery efficiency is low. According to one embodiment of the present invention, a power supply circuit includes an alternating-current signal synthesis unit including a plurality of alternating-current coupling elements having primary sides to which respective input alternating-current signals are input and secondary sides connected in series with each other, and a control circuit that outputs an input selection signal specifying a combination of the input alternating-current signals to be synthesized. The control circuit generates the input selection signal so as to maximize the output alternating-current signal synthesized by the alternating-current synthesis signal unit.

Power Supply Circuit

A control voltage generating circuit according to an aspect of the present invention includes: a reference voltage unit that includes a plurality of first transistors of the same conductivity type connected in series between a first power supply and a second power supply, and generates a drain voltage of one of the plurality of first transistor as a reference voltage; and a voltage conversion unit that includes a plurality of second transistors connected in series between the first power supply and the second power supply and having the same conductivity type as that of the reference voltage, supplies the reference voltage to a gate of one of the plurality of second transistors, and outputs a drain voltage of one of the plurality of second transistors as a control voltage.

Control voltage generating circuit, constant current source circuit, and delay circuit and logic circuit including the same

The invention discloses a connection relation detecting system, an information processing apparatus, and a connection relation detecting method. The connection relation detecting system according to the present invention includes a plurality of modules which include a plurality of connection ports which can connect with another module, and an information processing device which, when the plurality of modules are connected with each other, is connected to one of the plurality of modules through the connection ports. Each of the plurality of modules includes a connection changing unit which connects the connection ports inside the module in response to a connection change request from the information processing device. The information processing device includes a connection detecting unit which, when the information processing device makes the connection change request to the module, detects a module newly recognized through the module as a module connected to the module to which the connection change request is made.

Connection relation detecting system, information processing apparatus, and connection relation detecting method

An instruction execution control system includes a plurality of instruction storage units configured to output instructions in an FIFO order to a plurality of instruction execution units configured to execute the instructions; an instruction control unit configured to assign each of a plurality of the sequentially input instructions to one of the instruction storage units, and an output control unit configured to control the output of the instructions from the instruction storage units. When the input instruction is a dummy instruction to be inserted between instructions that should be executed in an execution order, the instruction control unit distributes the input instruction to the plurality of instruction storage units. The output control unit stops the output of the instructions from the instruction storage unit, the instruction output therefrom has become the dummy instruction, to the instruction execution unit until instructions output from all instruction storage units become the dummy instructions.

Koichiro Noguchi

Papers

A 280nW, 100kHz, 1-cycle start-up time, on-chip CMOS relaxation oscillator employing a feedforward period control scheme

Power Supply Circuit

Control voltage generating circuit, constant current source circuit, and delay circuit and logic circuit including the same

Connection relation detecting system, information processing apparatus, and connection relation detecting method

Instruction execution control system and instruction execution control method