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Showing papers by "Lars Hedrich published in 2016"


Proceedings ArticleDOI
01 Sep 2016
TL;DR: A systematic and fast analog coverage-driven verification methodology which could increase the confidence in verification of today’s analog blocks by using characteristic properties of a discretized representation of the state space such as the spatial distribution of eigenvalues, guiding the generation of short and purposeful stimuli.
Abstract: This paper proposes a systematic and fast analog coverage-driven verification methodology which could increase the confidence in verification of today’s analog blocks. We define an appropriate coverage metric to score simulations and then minimize the simulation effort for achieving full state space coverage with an algorithm generating appropriate input stimuli. Our proposed method uses characteristic properties of a discretized representation of the state space such as the spatial distribution of eigenvalues, guiding the generation of short and purposeful stimuli. The experimental results show a significant speed-up with similar accuracy compared to the state-of-the-art.

13 citations


Proceedings ArticleDOI
14 Mar 2016
TL;DR: This special session demonstrates the verification of functional properties using simulative and formal methods to reach sufficient verification coverage with reasonable time and effort and uses enhanced simulation schemes to avoid conventional simulation drawbacks.
Abstract: Analog-/Mixed-Signal (AMS) design verification is one of the most challenging and time consuming tasks of todays complex system on chip (SoC) designs. In contrast to digital system design, AMS designers have to deal with a continuous state space of conservative quantities, highly nonlinear relationships, non-functional influences, etc. enlarging the number of possibly critical scenarios to infinity. In this special session we demonstrate the verification of functional properties using simulative and formal methods. We combine different approaches including automated abstraction and refinement of mixed-level models, state-space discretization as well as affine arithmetic. To reach sufficient verification coverage with reasonable time and effort, we use enhanced simulation schemes to avoid conventional simulation drawbacks.

12 citations