A circuit configuration has a first semiconductor switch and a first protection circuit. The protection circuit has a second semiconductor switch whose load path is connected between a control terminal and a load path terminal of the first semiconductor switch. The second semiconductor switch is switched on by a comparator circuit, in each case for a predefined time period, in dependence on a comparison between a load path voltage and a reference voltage, or between a load path current and a reference current.

Circuit configuration having a semiconductor switch and a protection circuit

An apparatus, and a method of controlling a solid state power controller ("SSPC") (18) selectively allows a current through a solid state power control switch (42) in response to the current in an SSPC or a plurality of SSPCs exceeding at least one threshold. A microprocessor module (60) collects power surge data from a plurality of groups of SSPCs, and determines if the amount of power surge data within a group of SSPCs is sufficient to constitute a lightning threat. If the microprocessor module determines a lightning threat is present, the microprocessor module sends a command to certain SSPCs in the afflicted group to lockout an instantaneous trip protection for the duration of the lightning threat, allowing the power surge to pass from the SSPCs to a load or plurality of loads, leaving the SSPCs undamaged.

Solid state power controller with lightning protection

A new type of passive battery pack short circuit protection is provided in a battery pack consisting of one or more battery cells, with on load charge and on load conditioning-discharge capability, having a minimum of only 2 terminals. At least one voltage clamping device is included in the charge path of the battery to provide both charge and conditioning-discharge capability. A charging system provides both charging and discharging controls so that current can be either charged to or discharged from the battery through the voltage clamping device. The breakdown voltage of the voltage clamping device is selected to be equal to or greater than the maximum battery voltage, thus providing short circuit protection of the battery pack while still allowing a discharge function with a minimum of 2 terminals. The charging system provides a positive charge current to charge the battery through the voltage clamping device and a negative voltage potential equal to or greater than the reverse breakdown voltage of the voltage clamping device, in conjunction with a current control, to discharge the battery.

Passively protected battery pack with on load charge and on load conditioning-discharge capability and charging system

A drive circuit includes a gate voltage detector that detects a gate-emitter voltage Vge that appears between the gate and emitter of a power semiconductor device throughout a detection time period during which a sampler allows the process of detecting the gate-emitter voltage Vge, and that recognizes the occurrence of an abnormality in the power semiconductor device when the gate-emitter voltage Vge exceeds a reference value. Therefore, the drive circuit can protect the power semiconductor device with higher reliability by promptly detecting the occurrence of a short circuit even when the power semiconductor device is resistant to high voltages.

Drive circuit for driving power semiconductor device

An integrated overvoltage and reverse voltage protection circuit. The protection circuit includes a field-effect transistor having a source terminal coupled to an input terminal of the protection circuit, and a drain terminal coupled to an output terminal of the protection circuit. A resistor is coupled between the source terminal and the body terminal of the field-effect transistor to inhibit reverse current flow during a reverse voltage condition. A voltage-current dependent circuit is coupled between the gate terminal and the source terminal of the field-effect transistor, and is configured to apply a voltage between the gate terminal and the source terminal that is dependent on the current passing through the voltage-current dependent circuit. A current application circuit is coupled to the voltage-current dependent circuit and is configured to apply a current that limits or even altogether stops an applied overvoltage condition from reaching a load circuit.

Integrated overvoltage and reverse voltage protection circuit

A circuit and method for detecting and protecting against an overcurrent condition in a power transistor switching device, and particularly an IGBT. The power transistor switching device has main terminals and a control terminal, the main terminal having a normal saturation voltage therebetween during normal conduction of the power transistor device. The circuit includes a driver providing control signals to the control terminal of the power transistor device for switching the power transistor device on and off, a sensing circuit coupled to the power transistor device for sensing the saturation voltage of the power transistor device, and a switching circuit coupled to the control terminal of the power transistor device and responsive to the sensing circuit for removing the control signals from the control terminal in the event the saturation voltage reaches an abnormal level indicating an overcurrent condition in the power transistor device.

Method and apparatus for short circuit protection of power transistor device

In order to protect a polarity-sensitive load from a reversed battery assembly, the drain and source electrodes of a MOSFET (or bipolar transistor) device are connected in series with the load and battery and its gate electrode is connected to or otherwise coupled to a node between a battery terminal and the load If the battery is inserted with correct polarity, the transistor is turned on and inserts its small on-resistance into the circuit If the battery is inserted with incorrect polarity, the transistor does not turn on, and the polarity-sensitive load is protected

Reverse battery protection circuit

Verfahren und Vorrichtung zur Kurzschluß-Sicherung von Leistungstransistor-Anordnungen

A circuit for eliminating false triggering of a power device in an optically coupled drive circuit caused by dv/dt sensitivity of an optocoupler of the drive circuit comprising a latch circuit having an input coupled to an output of the optocoupler and having an inhibit input; and an inhibit signal generating circuit coupled to an output of the latch circuit for providing an inhibit signal of a preset period of time to the inhibit input of the latch circuit when the output of the latch circuit changes state, thereby inhibiting the passage of any high dv/dt spurious or noise signals to the output of the latch circuit during the preset period of time.

Laszlo Kiraly

Papers

Method and apparatus for short circuit protection of power transistor device

Reverse battery protection circuit

Verfahren und Vorrichtung zur Kurzschluß-Sicherung von Leistungstransistor-Anordnungen

Method and Circuit to eliminate false triggering of power devices in optically coupled drive circuits caused by dv/dt sensitivity of optocouplers