Recently, multilevel inverters (MLIs) have gained lots of interest in industry and academia, as they are changing into a viable technology for numerous applications, such as renewable power conversion system and drives. For these high power and high/medium voltage applications, MLIs are widely used as one of the advanced power converter topologies. To produce high-quality output without the need for a large number of switches, development of reduced switch MLI (RS MLI) topologies has been a major focus of current research. Therefore, this review paper focuses on a number of recently developed MLIs used in various applications. To assist with advanced current research in this field and in the selection of suitable inverter for various applications, significant understanding on these topologies is clearly summarized based on the three categories, i.e., symmetrical, asymmetrical, and modified topologies. This review paper also includes a comparison based on important performance parameters, detailed technical challenges, current focus, and future development trends. By a suitable combination of switches, the MLI produces a staircase output with low harmonic distortion. For a better understanding of the working principle, a single-phase RS MLI topology is experimentally illustrated for different level generation using both fundamental and high switching frequency techniques which will help the readers to gain the utmost knowledge for advance research.

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Recently Developed Reduced Switch Multilevel Inverter for Renewable Energy Integration and Drives Application: Topologies, Comprehensive Analysis and Comparative Evaluation

Field programmable gate arrays (FPGAs) have established themselves as one of the preferred digital implementation platforms in a plethora of current industrial applications, and extensions and improvements are still continuously being included in the devices. This paper reviews recent advancements in FPGA technology, emphasizing the novel features that may significantly contribute to the development of more efficient digital systems for industrial applications. Special attention is paid to the design paradigm shift caused by the availability of increasingly powerful embedded (and soft) processors, which transformed FPGAs from hardware accelerators to very powerful system-on-chip (SoC) platforms. New analog resources, floating-point operators, and hard memory controllers are also described, because of the great advantages they provide to designers. Software tools are being strongly influenced by the design paradigm shift, which requires from them a much better support for software developers. Focusing mainly on this issue, recent advancements in software resources [intellectual property (IP) cores and design tools] are also reviewed. The impact of new FPGA features in industrial applications is analyzed in detail in three main areas, namely digital real-time simulation, advanced control techniques, and electronic instrumentation, with focus on mechatronics, robotics, and power systems design. The way digital systems are being currently designed in these areas is comprehensively reviewed, and a critical analysis of how they could significantly benefit from new FPGA features is presented.

Advanced Features and Industrial Applications of FPGAs—A Review

Current harmonics is one of the most significant power quality issues which has attracted tremendous research interest. Shunt active power filter (SAPF) is the best solution to minimize harmonic contamination, but its effectiveness is strictly dependent on how quickly and accurately its control algorithms can perform. This manuscript reviews various types of existing control algorithms which have been employed for controlling operation of SAPF. Harmonic extraction, DC-link capacitor voltage regulation, current control and synchronizer algorithms are examined and discussed. The most relevant techniques which have been applied for each control algorithm are described and contrasted in an organized manner to identify their respective strengths and weaknesses. It is found that the applied control algorithms differ in two conditions: (1) the condition where harmonic current distortion is treated by the SAPF in the presence of non-ideal source voltage; and (2) the condition where multilevel inverter is employed as the circuit topology of SAPF.

https://www.mdpi.com/1996-1073/10/12/2038/pdf

Control Algorithms of Shunt Active Power Filter for Harmonics Mitigation: A Review

Multi-level inverter (MLI) is a promising technology, able to generate high-quality power with lower switching frequency. Therefore it leads to high conversion efficiency and low switching losses. Selective harmonic elimination is a fundamental frequency switching strategy that theoretically provides desirable output waveform for MLIs by elimination of low order harmonics. Unfortunately, complexity, non-linearity and solvability features attached to this method have limited its industrial application. In this study, a particle swarm optimisation (PSO)-based memetic algorithm (MA) guided by mesh adaptive direct search is introduced as a suitable choice for the harmonic optimisation problem. This algorithm is precise and applicable to any MLI. The results show that MA converges to the exact solution for feasible modulation index. When the problem has no exact solution, the algorithm finds a relatively proper solution to regulate the fundamental component of the voltage. Furthermore, the comparison between MA and other methods shows that the probability of convergence of MA is higher than others. For 48% of the analysed data MA reaches to a fitness value lower than 10
 -30
 whereas this probability is 5% for PSO and almost zero for genetic algorithm and bee algorithm. The proposed method has been implemented on a cascade seven-level inverter.

https://ietresearch.onlinelibrary.wiley.com/doi/pdf/10.1049/iet-pel.2014.0209

Application of memetic algorithm for selective harmonic elimination in multi-level inverters

Cascade multicell (CM) converters are characterized by their high modularity, allowing their power to be easily increased. This also allows any faulty module (cell) to be isolated, so the load can be fed by the remaining operative cells. This leads to operation with an unbalanced number of cells. The use of modified voltage references to avoid the unbalanced operation in steady state has been proposed in the literature (denoted as fundamental phase-shifted compensation). This paper presents the transient operation from normal to faulty operation when such voltages are used and an induction motor is driven by the converter. In the first place, a simple way to include fundamental phase-shifted compensation (FPSC) in closed-loop operation, specifically with a field-oriented control (FOC) scheme, is presented. Then, the use of two supervisor controllers is proposed to modify the FOC speed and flux references. These new references avoid hard torque pulsation while automatically determining the maximum power available from the converter and applying it to the load. Experimental results obtained with the proposed technique in a low-power CM converter are shown for two different cases, constant torque load and fan curve load, showing a significant improvement on the signal behavior.

Control Scheme for an Induction Motor Fed by a Cascade Multicell Converter Under Internal Fault

Cascaded multilevel converters are emerging as a new breed of power converter options for high-voltage and high-power applications. A cascaded three-phase-bridge (C3PB) multilevel topology is proposed in this study. The new multilevel converter topology is derived from an optimum combination of three-phase voltage source converter modules and it needs fewer switches and dc capacitors than Δ-connected cascaded H-bridge converter under the similar operation condition. The characteristics of the C3PB converter are presented through analysing its current relationship, voltage relationship and power allocation in detail; the analysis results show that all the converter modules equally share the output power. Based on carrier phase-shifted pulse-width modulation (CPS-PWM) technique, simulation results of two-level and three-level inverter are given to verify the theoretical analysis; meanwhile, CPS-PWM and power decoupling control method are employed to validate the three-level C3PB rectifier. Finally, based on Digital Signal Processor (DSP) + Field Programmable Gate Array (FPGA) control board, a lab prototype is built to verify the validity and feasibility of the proposed C3PB converter along with the proposed control method.

https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/iet-pel.2012.0510

Li-L. Zhao

Papers

Research on cascaded three-phase-bridge multilevel converter based on CPS-PWM