WSe2 2D p-type semiconductor-based electronic devices for information technology: Design, preparation, and applications

The conductivity of an $n$-type semiconductor has been calculated in the region of low-temperature $T$ and low impurity concentration ${n}_{D}$. The model is that of phonon-induced electron hopping from donor site to donor site where a fraction $K$ of the sites is vacant due to compensation. To first order in the electric field, the solution to the steady-state and current equations is shown to be equivalent to the solution of a linear resistance network. The network resistance is evaluated and the result shows that the $T$ dependence of the resistivity is $\ensuremath{\rho}\ensuremath{\propto}\mathrm{exp}(\frac{{\ensuremath{\epsilon}}_{3}}{\mathrm{kT}})$. For small $K$, ${\ensuremath{\epsilon}}_{3}=(\frac{{e}^{2}}{{\ensuremath{\kappa}}_{0}}){(\frac{4\ensuremath{\pi}{n}_{D}}{3})}^{\frac{1}{3}}(1\ensuremath{-}1.35{K}^{\frac{1}{3}})$, where ${\ensuremath{\kappa}}_{0}$ is the dielectric constant. At higher $K$, ${\ensuremath{\epsilon}}_{3}$ and $\ensuremath{\rho}$ attain a minimum near $K=0.5$. The dependence on ${n}_{D}$ is extracted; the agreement of the latter and of ${\ensuremath{\epsilon}}_{3}$ with experiment is satisfactory. The magnitude of $\ensuremath{\rho}$ is in fair agreement with experiment. The influence of excited donor states on $\ensuremath{\rho}$ is discussed.

Impurity Conduction at Low Concentrations.

The rapidly emerging requirement for device miniaturization and structural flexibility make 2D semiconductors and their van der Waals (vdWs) heterostructures extremely attractive for nonvolatile optoelectronic memory (NOM) applications. Although several concepts for 2D NOM have been demonstrated, multi-heterojunction devices capable of further improving storage performance have received little attention. This work reports a concept for MoS2/black phosphorus (BP)/MoS2 multi-heterojunction NOM with artificial trap sites through the BP oxidation, in which the trapped holes at BP/POx interface intrigue a persistent photoconductivity that hardly recovers within the experimental time scales (exceeding 104 s). As a result of the interfacial trap-controlled charge injection, the device exhibits excellent photoresponsive memory characteristics, including a record high detectivity of ≈1.2 × 1016 Jones, a large light-to-dark switching ratio of ≈1.5 × 10, an ultralow off-state current of ≈1.2 pA, and an outstanding multi-bit storage capacity (11 storage states, 546 nC state–1). In addition, the middle BP layer in the multi-heterojunction enables broadband spectrum distinction (375–1064 nm), together with a high polarization ratio of 8.4. The obtained results represent the significant step toward the high-density integration of optoelectronic memories with 2D vdWs heterostructures.

Polarization‐Resolved Broadband MoS2/Black Phosphorus/MoS2 Optoelectronic Memory with Ultralong Retention Time and Ultrahigh Switching Ratio

A relatively new and promising method to tune properties of monolayers is by forming a heterostructure of them. Here, the van der Waals heterostructure of graphene-like zinc oxide (g-ZnO) and 1-trigonal titanium disulfide (1T-TiS2) was formed and its structural, electronic, and optical properties were studied in the framework of density functional theory. The dynamical stability of the heterostructure was confirmed based on its phonon band structure. An indirect (Γ → M) bandgap of 0.65 eV, a large built-in electric field (or a large potential drop of 3.12 eV), a type-II (staggered) band alignment, and a large conduction band offset of 2.94 eV were found to form across the interface, which are all desirable for potentially efficient separation of charge carriers. We showed also that the formation of the heterostructure largely enhances the almost-zero optical absorption of g-ZnO in visible and near-infrared regions, which is desirable for optoelectronic applications. By applying a perpendicular electric field, we could tune the bandgap value and the band alignment type (type-II → type-I) of the heterostructure. Finally, we showed that by applying compressive strain, one can change the band alignment type (type-II → type-I) and by applying tensile strain, the bandgap value could be tuned and a crossover occurs in the bandgap type (indirect → direct → indirect).

Tunable electronic properties of the novel g-ZnO/1T-TiS2 vdW heterostructure by electric field and strain: crossovers in bandgap and band alignment types.

Sensitivity Analysis of Biomolecule Nanocavity Immobilization in a Dielectric Modulated Triple-Hybrid Metal Gate-All-Around Junctionless NWFET Biosensor for Detecting Various Diseases

van der Waals heterojunctions based on two-dimensional materials are attractive for tunnel field-effect transistors, but their atomically clean and electronically sharp junction interfaces fail to realize satisfactory tunneling behavior. This work reveals the phenomenon of band offset degradation in these heterojunctions, induced by interlayer charge transfer, which can impede the band-alignment configuration that is key to turning on such devices. These discoveries help to explain the calculated deviations in heterojunction band alignment, and should be highlighted in tunnel-device exploration.

Band-Offset Degradation in van der Waals Heterojunctions

Gate leakage current is an issue for the reliability of modern high-$\ensuremath{\kappa}$ MOSFETs. Although various physical models describing both direct tunneling and trap-assisted contribution of leakage current have been presented in the literature, many of them treats traps in the dielectric as a continuum distribution in energy and position, and trap-to-trap transport of electrons has so far been mostly neglected or not treated three dimensionally. In this work, we present a mechanistic model for calculation of gate leakage current in high-$\ensuremath{\kappa}$ MOSFET multilayer stacks based on multiphonon trap-assisted tunneling theory, taking into account the intrinsic three-dimensional (3D) discreteness of traps in the dielectric. Our model can to a good approximation reproduce the experimental results at different dielectric thicknesses, gate voltages, temperatures, and different gate materials. We find that in realistic devices, the 3D trap-to-trap transport of electrons contributes a non-negligible part to the gate leakage current. This contribution is more pronounced at low-voltage device operations, which is important for low-power applications. We calculate the intrinsic fluctuation of gate leakage current due to positional and energetic disorder of traps in the dielectric, and conclude that positional disorder is more important than energetic disorder for realistic material parameters. The calculated gate leakage current depends sensitively on temperature, trap energy, and trap density. We provide a computationally efficient 3D master equation approach that enables 3D mechanistic simulation of ${10}^{3}$ traps on the order of minutes on a standard desktop computer.

Ling Li

Papers

Band-Offset Degradation in van der Waals Heterojunctions

Three-Dimensional Mechanistic Modeling of Gate Leakage Current in High- κ MOSFETs