H.264/AVC, the result of the collaboration between the ISO/IEC Moving Picture Experts Group and the ITU-T Video Coding Experts Group, is the latest standard for video coding. The goals of this standardization effort were enhanced compression efficiency, network friendly video representation for interactive (video telephony) and non-interactive applications (broadcast, streaming, storage, video on demand). H.264/AVC provides gains in compression efficiency of up to 50% over a wide range of bit rates and video resolutions compared to previous standards. Compared to previous standards, the decoder complexity is about four times that of MPEG-2 and two times that of MPEG-4 Visual Simple Profile. This paper provides an overview of the new tools, features and complexity of H.264/AVC.

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Video coding with H.264/AVC: tools, performance, and complexity

We present a syntax-based statistical translation model. Our model transforms a source-language parse tree into a target-language string by applying stochastic operations at each node. These operations capture linguistic differences such as word order and case marking. Model parameters are estimated in polynomial time using an EM algorithm. The model produces word alignments that are better than those produced by IBM Model 5.

https://faculty.washington.edu/fxia/courses/LING580MT/yamada_2001.pdf

A Syntax-based Statistical Translation Model

The paper surveys a decade of R&D on coarse grain reconfigurable hardware and related CAD, points out why this emerging discipline is heading toward a dichotomy of computing science, and advocates the introduction of a new soft machine paradigm to replace CAD by compilation.

A decade of reconfigurable computing: a visionary retrospective

Low power has emerged as a principal theme in today's electronics industry. The need for low power has caused a major paradigm shift in which power dissipation is as important as performance and area. This article presents an in-depth survey of CAD methodologies and techniques for designing low power digital CMOS circuits and systems and describes the many issues facing designers at architectural, logical, and physical levels of design abstraction. It reviews some of the techniques and tools that have been proposed to overcome these difficulties and outlines the future challenges that must be met to design low power, high performance systems.

/pdf/power-minimization-in-ic-design-principles-and-applications-4l53tahw7t.pdf

Power minimization in IC design: principles and applications

This tutorial surveys design methods for energy-efficient system-level design. We consider electronic sytems consisting of a hardware platform and software layers. We consider the three major constituents of hardware that consume energy, namely computation, communication, and storage units, and we review methods of reducing their energy consumption. We also study models for analyzing the energy cost of software, and methods for energy-efficient software design and compilation. This survery is organized around three main phases of a system design: conceptualization and modeling design and implementation, and runtime management. For each phase, we review recent techniques for energy-efficient design of both hardware and software.

/pdf/system-level-power-optimization-techniques-and-tools-58sern1xgm.pdf

System-level power optimization: techniques and tools

Custom Memory Management Methodology

In this paper we first illustrate the crucial impact of memory related power consumption on the global system power budget, in particular for multi-dimensional real-time signal processing subsystems. A realistic medical imaging demonstrator shows that the power budget of the system is clearly dominated by the memory access and that up to an order of magnitude can be gained by transforming the initial specification, even without incorporating the effect of a possible supply voltage reduction. We have analyzed the most relevant contributions in this power budget and propose several ways to reduce them. In addition, an automated transformation technique is described to decrease the memory related power budget.

Global communication and memory optimizing transformations for low power signal processing systems

Selected code is modeled in a polyhedral dependency graph (PDG). A placement optimizer maps each element of the PDG to an optimally placed PDG. An ordering optimizer maps the placed PDG to an optimally ordered PDG. The PDG, place PDG, and ordered PDG are combined to produce a transformation script. The transformation script is applied to the selected specification description to produce optimized selected code. Optimized selected code is combined with original code to generate a control-flow optimized code. In addition, memory directives are derived from the ordered PDG model. The memory directives and optimized code are used to generate target code for simulation or software compilation.

Control flow and memory management optimization

In this paper we illustrate the crucial impact of memory related power consumption on the global system power budget, in particular for multi-dimensional signal processing subsystems and for table-based communication network components. In addition, several design methods are described to decrease this impact by transforming the initial signal or data processing speciication, especially in terms of control ow transformations. Several of these methods are becoming supported by means of computer-aided design techniques. 1 Low power system design In practice, there are many ways to realize a given application. The system designer has for instance the choice between many algorithmic procedures for a desired behaviour (e.g. sorting). In order to make a motivated choice, it should be based on "quan-tiiable cost" measures (number of components, pin count, power consumption, area of custom components), augmented with other issues like market demand , time-to-money and competition. In general, a good trade-oo between these characteristics is crucial so there is a need for fast and early feedback already at the algorithm level without always descending to detailed RT/logic realization or layout level. It is also expected that only a relative comparison is required so that an accuracy of the measures within a few dozen % should be acceptable. This should allow us to develop relatively fast feedback techniques which provide estimates within at most a few hours for a design. In this paper, we will concentrate on reducing the cost of power consumption, though other characteristics will typically be involved too in a practical context. In particular, a combination of area and power has to be targeted in real-time systems for a One of the most prominent eeects on the accuracy of early cost evaluation is the innuence of transformations on the initial high-level speciication entered by the system designer. The actual form of this spec-iication typically aaects the outcome of the architectural mapping stage very heavily. The estimate for a speciic measure can be factors or even orders of magnitude wrong compared to the optimally reach-able result when the speciication is not optimized rst. This problem applies when one uses accurate architecture mapping tools but also for high-level es-timators, and even for manual mapping as long as the initial control/data ow graph is kept. Still, it is required to obtain fast and early feedback on system design decisions in most industrial environments. Therefore, there is a need for design automation methods/tools which transform …

Global Communication and Memory Optimizing Transformations for Low Power Systems

In this paper we present our power exploration methodology for data dominated video applications. This formalized methodology is based on the observation that for this type of application the power consumption is dominated by the memory architecture. Hence, the first exploration stage should be to come up with an optimized memory organisation. Other important observations are that the power consumption of the address generators is of the same magnitude as that of the data-paths and that the address generators are better optimized using specialized techniques.

/pdf/power-exploration-for-data-dominated-video-applications-arv4knbvtl.pdf

Lode Nachtergaele

Papers

Custom Memory Management Methodology

Global communication and memory optimizing transformations for low power signal processing systems

Control flow and memory management optimization

Global Communication and Memory Optimizing Transformations for Low Power Systems

Power exploration for data dominated video applications