In this paper, the authors discuss one- and three-dimensional space charge distributions in glass fibre/epoxy resin composites. By the conventional pulsed electroacoustic (PEA) method, only a one-dimensional distribution of the average charge over a whole area parallel to the two electrodes can be observed. Therefore, the authors have developed a new PEA system capable of measuring a three-dimensional space charge distribution. Using this system, they measured the charge distribution in glass fibre/epoxy resin composites made of lattice-woven glass fibre and epoxy resin. It has become clear that spatial variation in signal intensity observed depends on the internal structure of the composite. There appear repetitious positions where a high charge density is observed on the same lateral cross section along the vertical direction in the composite. Such positions are consistent with the intersections of the glass fibres. Accumulation of mobile charge carriers or appearance of polarization charge due to mismatch of the ratio of the conductivity and permittivity between the glass fibre and the epoxy resin is thought to be responsible for the PEA signals.

Space charge distributions in glass fibre/epoxy resin composites under dc 10 kV mm -1 electric field

This paper presents a tin-based solder bonding technology for microelectromechanical systems (MEMS) fabrication and packaging applications. Electroplated tin on a lithographically patterned seed layer of chrome–gold was used for bonding two Pyrex substrates. Average values of the tensile strength and the shear strength obtained were 14.6 MPa and 5.78 MPa, respectively. Shear strength data were analysed using Weibull statistics, which revealed presence of multiple failure mechanisms and an average value of β greater than 3. Failure occurred not only at the tin–tin bond interface but also at the tin–chrome interface. Highest values for the bond strength were obtained when the samples failed due to delamination at the tin–tin bond interface. Acoustic images of the bonded interface were used to qualitatively study the degradation in the bond interface when subjected to tensile stresses. Hermetic testing of the samples using a conventional He-leak detector showed leak integrity of better than 1 × 10−11 mbar l s−1.

Tin-based solder bonding for MEMS fabrication and packaging applications

In this study, solder ball incorporated polyvinylidenefluoride (PVDF) nanofiber was added into the ACF systemto overcome short circuit issues of fine pitch flex-on-flex (FOF) assembly. Also, in order to improve the thermal mismatch of the flexible substrate which can lead to electrode misalignment during the bonding process, low melting temperature Sn58Bi solder balls were used with vertical ultrasonic (U/S) bonding method. When performing FOF assembly using PVDF nanofiber/Sn58Bi solder ACF and vertical ultrasonic bonding, PVDF nanofiber/Sn58Bi solder ACFs showed 34% higher solder capture rate on an electrode compared to conventional Ni ACFs and conventional Sn58Bi solder ACFs. Additionally, PVDF nanofiber/Sn58Bisolder ACFs showed 100% insulation between neighboring electrodes where conventional Ni ACFs and conventional Sn58Bi solder ACFs showed 75% and 87.5% insulation. Other electrical properties such as contact resistance and current handling capability as well as reliability test of PVDF nanofiber/Sn58Bi solder ACFs showed improved results compared to those of conventional Ni ACFs, which proves the formation of stable solder joint of PVDF nanofiber/Sn58Bi solder ACFs.

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Low temperature flex-on-flex assembly using polyvinylidene fluoride nanofiber incorporated Sn58Bi solder anisotropic conductive films and vertical ultrasonic bonding

Low temperature bonding techniques with high bond strengths and reliability are required for the fabrication and packaging of MEMS devices. Indium and indium-tin based bonding processes are explored for the fabrication of a flextensional MEMS actuator, which requires the integration of lead zirconate titanate (PZT) substrate with a silicon micromachined structure at low temperatures. The developed technique can be used either for wafer or chip level bonding. The lithographic steps used for the patterning and delineation of the seed layer limit the resolution of this technique. Using this technique, reliable bonds were achieved at a temperature of 200°C. The bonds yielded an average tensile strength of 5.41 MPa and 7.38 MPa for samples using indium and indium-tin alloy solders as the intermediate bonding layers respectively. The bonds (with line width of 100 microns) showed hermetic sealing capability of better than 10-11 mbar-l/s when tested using a commercial helium leak tester.

Reliable bonding using indium-based solders

In this paper, four modeling approaches such as InsCTE, MeanCTE, EqvCTE and CureCTE + MeanCTE, were employed to predict the substrate warpage Both laminate and leadless leadframe substrates were evaluated The effect of mold compound chemical cure shrinkage on the substrate warpage was also investigated A laser profilometer was used to measure the warpage of the laminate and leadless leadframe substrates Our findings show that CureCTE + MeanCTE modeling approach correlates well with the warpage measurement Therefore, the effect of mold compound chemical cure shrinkage is important and has to be implemented appropriately in the model for accurate warpage predictions It can also be used in package designs and material selections to eliminate the coplanarity issue and achieve an improved assembly process yield in future developments

Impact of Mold Compound Cure Shrinkage on Substrate Block Warpage Simulation

In this paper, an overview is given of trends in electronic packaging and assembly for portable consumer products. With regard to components, the focus is on thinner and smaller packages with a higher lead count. To save board space, integrated passive components in CSP format are being developed. The use of modules that provide a complete function is increasing. Advantages are flexibility, diversity, and cheaper and simpler second-level assembly (the high-density interconnect is limited to the interior of the module). Both motherboards and interposer substrates (used in packages and modules) are characterised by smaller features to accommodate higher I/O density, and reduced thickness to limit the overall electronic assembly height. For the same reasons, techniques and materials have been developed to enable embedded passives. New substrate materials have been developed with better electrical and thermal behaviour to comply with RF requirements. In assembly processes, package assembly is done increasingly at wafer or substrate level to save costs, increase production volume, and facilitate package miniaturisation. Standard reflow soldering is optimised to enable the integration of CSPs and flip-chips on the motherboard. In some areas, conductive adhesive is used, e.g. to get smaller bump pitches on flip-chips. Finally, due to market demand and legislation, assembly processes, components, and materials must be adapted to realise environmentally friendly products. Special attention is paid to the elimination of lead, volatile organic compounds, and halogens.

M. Verguld

Papers

Trends in electronic packaging and assembly for portable consumer products