In this paper, the design and characterization of a tunable patch antenna loaded with complementary split ring resonators (CSRRs) on the patch have been realized. To achieve tunable resonant frequency, bandwidth and radiation pattern, the antenna is further loaded with coplanar waveguide (CPW) on which Microelectromechanical System (MEMS) capacitive switches are placed periodically. The tunable property is achieved, when the switches moves from up state with the capacitive gap 1.5 μm to down state having capacitive gap of 1 μm. A parametric analysis has been presented to check the sensitivity of the antenna in terms of S11 parameter by varying different parameters of the MEMS switches and CSRRs. This work, strives to improve the degree of reconfigurability with increase in the number of switches. The value of actuation voltage to move switch from up to down state is 10.4 V, which is very low over the other design. The switches exhibit fundamental frequency 14.6 kHz, switching time 28.59 μs, and capacitance ratio 15.27. Simulation has been carried out in Ansoft HFSS v. 13 and the distinct characterization property of the tunable antenna is shown through simulation.

Design and characterization of a tunable patch antenna loaded with capacitive MEMS switch using CSRRs structure on the patch

This paper reports the design, fabrication, electrical characterization and packaging of micromachined shunt capacitive switch with low actuation voltage. These switches are fabricated on a low resistive silicon substrate using only a four mask surface micromachining process. The co-planar waveguide is patterned using chrome/gold layer. Positive photoresist S1813 is used as the sacrificial layer. The top beam membrane is made of gold. The membranes are released through a wet release process through Piranha solution. Supercritical point drying tools were used for the top beam release after wet etching to provide anti-stiction. The switches are 300 µm long with 10 μm holes on the top membrane to lower both residual stress and pull-in voltages. These switches exhibit low actuation voltages in the range of 5.5–6.4 V. The RF characterization shows that these switches have low insertion loss and high isolation in the frequency range of interest. The packaging was carried out using commercially available surface mount style RF packages. However, the whole packaging process is performed under low temperature in order to free the MEMS structures of thermally induced stress which otherwise would affect the performance of the switch. The adhesion of the die to the bottom package is excellent and is tested by die shear test. The packaged switch has passed the non-destructive pull test.

Design, fabrication, characterization of micromachined capacitive shunt switches with low actuation voltages and low temperature packaging

Gyroelectric n and p type's waveguides were usually investigated using differential Maxwell's equations, coupled mode and partial area methods, coherent approaching, least square methods. Computation time of one particular model of this type of waveguide might take quite a long time and even to a couple of days using one of these analytical methods. The whole investigation may require a lot of time in the first stage of research until the right model of waveguide will be found. The artificial neural networks were adjusted for the investigation of gyroelectric n GaAs waveguides. Multilayer perceptron network was selected during investigation. Advantages of artificial neural networks comparing with analytical methods are presented in this paper. The investigation showed that difference between results, obtained using analytical methods, and results, obtained by using artificial neural networks, do not differ by more than 12%. On the other hand prediction using artificial neural networks is performed about 2000 times faster than using traditional methods.

The prediction of cut-off frequencies of models of gyroelectric waveguides using artificial neural networks

A new analysis method for the improvement and optimization of the geometrical layout parameter associated with the on-chip n-well meander line resistor layout to have a low-quality factor (Q) and better performance operating at high frequency is investigated through factorial design experiment DOE efficient method. The factors influencing the Q-factor include the width, line length, line segment, and spacing were studied. The factorial design DOE process model was formulated using the Minitab statistical package. The result in terms of the quality factor and resistance for comparison between the proposed optimized design and conventional design layout is simulated by Sonnet electromagnetic simulation tool and validated by the theoretical mathematical prediction calculation based on an equation of lumped physical model had been presented. Results indicate that a shorter line length and line segment lead to a high impact on the improvement of the Q-factor. By the factorial design experiment, the optimized structure with a single line segment, the width of 5 µm, spacing of 1 µm, and line length of 16 µm had been established to have a lower Q-factor compared to the conventional configuration. The Q-factor was improved by 93% from 1.193 to 0.071 at the targeted 1 GHz frequency by the Sonnet EM simulation tool. The simulation result had shown comparative agreement to the theoretical mathematical predictions analysis result. 

Optimization of On-Chip Meander Line Resistor by Using DOE Method

Packaging of Micro-Electro-Mechanical system (MEMS) at wafer-level is one of the critical areas for its application, as the MEMS elements are delicate and can easily get damaged during wafer scribing or packaging process. We describe here a novel approach for wafer-level encapsulation of GaAs-based RFMEMS switches. EM simulation of the proposed microcaps has been carried out to study the effect of encapsulation on the switch performance. Both GaAs and Pyrex glass-based caps have been fabricated and the switches were encapsulated. The performance of the packaged switches has been characterized and the measured results show a close agreement with EM simulation.

Mahadeva K. Bhat

Papers

Design and Electrical Characterization of Wafer-level Micro-package for GaAs-based RFMEMS Switches