Showing papers by "Mani Soma published in 2000"

Jitter measurement apparatus and its method

Abstract: A signal under measurement is converted into a digital signal by an AD converter, and a band-pass filtering process is applied to the digital signal to take out only components around a fundamental frequency of the signal under measurement. A data around a zero-crossing of the components around the fundamental frequency is interpolated to estimate a timing close to a zero-crossing point. A difference between adjacent timings in the estimated zero-crossing timing sequence is calculated to obtain an instantaneous period data sequence. A period jitter is obtained from the instantaneous period data sequence.

Jitter measurements of a PowerPC/sup TM/ microprocessor using an analytic signal method

Abstract: This paper demonstrates a new method for measuring both peak-to-peak and RMS jitter in PLL output signals. The theoretical basis for this method is derived from analytic signal theory. To validate the method, experimental data from PowerPC/sup TM/ microprocessor jitter measurements is compared with results obtained with the conventional time interval analyzer (TIA) technique.

Method for fabricating integrated circuit (IC) dies with multi-layered interconnect structures

Abstract: In a method for fabricating an LSI in which primitive devices such as transistors are formed on a semiconductor substrate and a plurality of interconnect layers are formed thereover to provide sub-circuits of successively larger scale and increasing complexity including sub-circuits which are formed by a connection of the primitive devices and sub-circuits of a larger scale which are formed by a connection of the sub-circuits, under a condition that an intermediate interconnect layer is formed, an exhaustive test, a functional test, a stuck-at fault test, a quiescent power supply current test or the like takes place with respect to the primitive devices or the sub-circuits which are wired together by the intermediate interconnect layer, and subsequently, a wiring connection test takes place after the formation of each subsequent interconnect layer. A fault coverage is improved while a testing cost and a fabricating cost are reduced.

Apparatus for and method of measuring a peak jitter

Abstract: An input clock signal is transformed into a complex analytic signal z c (t) by an analytic signal transforming means 13 and an instantaneous phase of its real part x c (t) is estimated using the analytic signal z c (t). A linear phase is removed from the instantaneous phase to obtain a phase noise waveform Δφ(t). A peak value Δφ max of absolute values of the Δφ(t) is obtained, and 4Δφ max is defined as the worst value of period jitter of the input signal. The Δφ(t) is sampled at a timing close to a zero-crossing point of the x c (t) to extract the sample value. A differential between adjacent samples is obtained in the sequential order to calculate a root-mean-square value of the differentials (period jitters). An exp(−(2Δφ max ) 2 /(2σ j 2 )) is calculated from the mean-square value σ j and 2Δφ max , and the calculated value is defined as a probability that a period jitter exceeds 2Δφ max .

Charge-based frequency measurement bist

Abstract: A charge-based frequency measurement BIST (CF-BIST) for clock circuits and oscillator circuits is described that requires no outside test stimulus and produces a digital test output. The CF-BIST technique performs structural and defect-oriented testing and uses existing blocks to save die area. The technique adds a multiplexer to the non-sensitive digital path. The system uses the existing VCO as the measuring device and divide-by-N as a frequency counter to reduce the area overhead. The described technique produces an efficient pass/fail evaluation, low-cost and practical implementation of on-chip BIST structure.

Apparatus for and method of detecting a delay fault in a phase-locked loop circuit

Abstract: There is provided a method and an apparatus for detecting a delay fault in a phase-locked loop circuit. A frequency impulse is applied to the PLL circuit under test as a reference clock, and a waveform of a signal outputted from the PLL circuit under test is transformed to an analytic signal to estimate its instantaneous phase. A linear phase is estimated from the estimated instantaneous phase, and the estimated linear phase is removed from the estimated instantaneous phase to obtain a fluctuation term of the instantaneous phase. A delay fault is detected by comparing a time duration during which the PLL circuit stays in a state of oscillating a certain frequency with the time duration during which a fault-free PLL circuit stays in a state of oscillating a certain frequency.

Apparatus and method for measuring quality measure of phase noise waveform

Abstract: A clock signal x c (t) that has been converted into a digital signal is transformed into a complex analytic signal z c (t), and an instantaneous phase Θ of the z c (t) is estimated. A linear phase is removed from the Θ to obtain a phase noise waveform Δφ(t). The Δφ(t) is sampled at a timing close to a zero crossing timing of the x c (t) to extract the Δφ(t) sample. A root-mean-square value σ t of the Δφ(t) samples is obtained, and a differential waveform of the extracted Δφ(t) samples is also obtained to obtain a period jitter J p . Then a root-mean-square value σ p of the J p is obtained to calculate a correlation coefficient ρ tt =1−(σ p 2 /(2σ t 2 )). If necessary, an SNR t =ρ tt 2 /(1−ρ tt 2 ) is obtained. The ρ tt and/or the SNR t is defined as a quality measure of a clock signal.

Delay fault detection in PLL circuit for very large integrated circuit, involves measuring oscillation frequency maintaining time period, using delay time of variation parameter of instantaneous signal phase

Abstract: Impulse signal is applied as standard clock to a phase locked loop (PLL) circuit. Instantaneous phase of signal generated by PLL circuit is estimated, to compute linear phase. The linear phase is removed from instantaneous phase to measure variation parameter, by which the delay time is measured and delay failure is judged by calculating time interval, during which oscillation frequency is maintained. An Independent claim is also included for PLL delay fault detector.

Vorrichtung zum Messen eines Jitters An apparatus for measuring a jitter

Abstract: Vorrichtung zum Messen des Jitters eines Eingangsignals, mit: An apparatus for measuring the jitter of an input signal, comprising: Analytik-Signal-Umformungsmitteln (11) zum Umformen des Eingangssignals in ein komplexes analytisches Signal; Analysis signal forming means (11) for transforming the input signal into a complex analytic signal; Momentanphasen-Schatzmitteln (12) zur Ermittlung der Momentanphase des Eingangssignals aus dem analytischen Signals; Instantaneous phase estimator means (12) for determining the instantaneous phase of the input signal from the analytic signal; Linearphasen-Entfernungsmitteln (13) zur Ermittlung einer linearen Phasenkomponente der Momentanphase und zum Entfernen der linearen Phasenkomponente aus der Momentanphase, um eine Phasenrausch-Wellenform zu erhalten; Linear phase removing means (13) for determining a linear phase component of the instantaneous phase, and removing the linear phase component from the instantaneous phase to obtain a phase noise waveform; und and Jittererfassungsmitteln (14, 15, 73) zur Ermittlung des Jitters des Eingangsignals aus der Phasenrausch-Wellenform. Jittererfassungsmitteln (14, 15, 73) for determining the jitter of the input signal from the phase noise waveform.