Most engineering and scientific phenomena, such as the surface of a landscape or the continuously changing temperature at a location are inherently infinite in space or time or both. We cannot measure all the data. Generally it is possible to record surface elevation values or the temperature only at some specific locations and times.

Interpolation and Approximation

The performance of most digital systems today is limited by their communication or interconnection, not by their logic or memory. As designers strive to make more efficient use of scarce interconnection bandwidth, interconnection networks are emerging as a nearly universal solution to the system-level communication problems for modern digital systems. 


Interconnection networks have become pervasive in their traditional application as processor-memory and processor-processor interconnect. Point-to-point interconnection networks have replaced buses in an ever widening range of applications that include on-chip interconnect, switches and routers, and I/O systems. 


In this book, the authors present in a structured way the basic underlying concepts of most interconnection networks and provide representative solutions that have been implemented in the industry or proposed in the research literature.

* Gives a coherent, comprehensive treatment of the entire field
* Presents a formal statement of the basic concepts, alternative design choices, and design trade-offs
* Provides thorough classifications, clear descriptions, accurate definitions, and unified views to structure the knowledge on interconnection networks
* Focuses on issues critical to designers

Table of Contents

Foreword
Foreword to the First Printing
Preface
Chapter 1 - Introduction
Chapter 2 - Message Switching Layer
Chapter 3 - Deadlock, Livelock, and Starvation
Chapter 4 - Routing Algorithms
Chapter 5 - CollectiveCommunicationSupport
Chapter 6 - Fault-Tolerant Routing
Chapter 7 - Network Architectures
Chapter 8 - Messaging Layer Software
Chapter 9 - Performance Evaluation
Appendix A - Formal Definitions for Deadlock Avoidance
Appendix B - Acronyms
References
Index

Interconnection Networks

Current state-of-the-art on-chip networks provide efficiency, high throughput, and low latency for one-to-one (unicast) traffic. The presence of one-to-many (multicast) or one-to-all (broadcast) traffic can significantly degrade the performance of these designs, since they rely on multiple unicasts to provide one-to-many communication. This results in a burst of packets from a single source and is a very inefficient way of performing multicast and broadcast communication. This inefficiency is compounded by the proliferation of architectures and coherence protocols that require multicast and broadcast communication. In this paper, we characterize a wide array of on-chip communication scenarios that benefit from hardware multicast support. We propose Virtual Circuit Tree Multicasting (VCTM) and present a detailed multicast router design that improves network performance by up to 90\% while reducing network activity (hence power) by up to 53%.Our VCTM router is flexible enough to improve interconnect performance for a broad spectrum of multicasting scenarios,and achieves these benefits with straightforward and inexpensive extensions to a state-of-the-art packet-switched router.

Virtual Circuit Tree Multicasting: A Case for On-Chip Hardware Multicast Support

This survey aims to provide a comprehensive overview of the current research on underwater wireless sensor networks, focusing on the lower layers of the communication stack, and envisions future trends and challenges. It analyzes the current state-of-the-art on the physical, medium access control and routing layers. It summarizes their security threads and surveys the currently proposed studies. Current envisioned niches for further advances in underwater networks research range from efficient, low-power algorithms and modulations to intelligent, energy-aware routing and medium access control protocols.

https://www.mdpi.com/1424-8220/14/1/795/pdf

Underwater Acoustic Wireless Sensor Networks: Advances and Future Trends in Physical, MAC and Routing Layers

Error resiliency schemes in H.264/AVC standard

This paper addresses the problem of reducing the memory usage in the implementation of a reversible two-dimensional wavelet transform for image processing. In particular, we take a line-based approach by using a recursive algorithm to ease the synchronization among different buffer levels. In addition, since the reversible transform is non-linear, to preserve reversibility, we have to consider the order of the horizontal and vertical transforms in which the two-dimensional forward and inverse wavelet transform are decomposed. The proposed algorithm is suitable for integer-only devices (such as many FPGAs), reducing in more than 250 times the memory requirements, for a 5-Megapixel image with the well-known B5/3 wavelet transform. Moreover, it is several times faster (up to ten times) in cache-based systems, due to the better use of the cache memory if compared with the regular wavelet transform

Fast integer-to-integer reversible lifting transform with reduced memory consumption

Achieving enhanced performance in MANETs using IEEE 802.11e

Intra video coding is a common way to process video material for applications like professional video editing systems, digital cinema, video surveillance applications, multispectral satellite imaging, HQ video delivery, etc. Most practical intra coding systems employ JPEG encoders due to their simplicity, low coding delay and low memory requirements. JPEG2000 is the main candidate to replace JPEG in this kind of applications due to the excellent R/D performance and high coding flexibility. However, its complexity and computational resources required for proper operation could be a limitation for certain applications. In this work, we propose an intra video codec, M-LTW, which is able to reach very good R/D performance results, as well as JPEG2000 or H.264 INTRA, with faster processing and lower memory usage.

M-LTW: a fast and efficient non-embedded intra video codec

Evaluating the performance impact of group mobility in MANETs

This research was supported by the Spanish Ministry of Economy and Competitiveness under Grant RTI2018-098156-B-C54, co-financed by FEDER funds (MINECO/FEDER/UE).

https://www.mdpi.com/2079-9292/9/11/1899/pdf

Manuel P. Malumbres

Papers

Fast integer-to-integer reversible lifting transform with reduced memory consumption

Achieving enhanced performance in MANETs using IEEE 802.11e

M-LTW: a fast and efficient non-embedded intra video codec

Evaluating the performance impact of group mobility in MANETs

A General Model for the Design of Efficient Sign-Coding Tools for Wavelet-Based Encoders