We present a proposal of a partial reconfiguration architecture for optically reconfigurable gate arrays and present an 11,424 gate dynamic optically reconfigurable gate array VLSI chip that was fabricated on a 96.04mm2 chip using an 0.35μm three-metal complementary metal oxide semiconductor process technology. The fabricated VLSI chip achieved a 2.21μs partial reconfiguration.

Dynamic optically reconfigurable gate array very large-scale integration with partial reconfiguration capability

This paper presents a proposal for a four-context programmable optically reconfigurable gate array (PORGA) with a high-resolution reflective silver-halide holographic memory and a corresponding writer system. The PORGA demonstrates the capability of 4.6-11.5-μs high-speed configuration context switching among four configuration contexts, which is 1000 times faster than that of conventional field programmable gate arrays (FPGAs).

A Four-Context Programmable Optically Reconfigurable Gate Array With a Reflective Silver-Halide Holographic Memory

Demand for fast dynamic reconfiguration has increased since dynamic reconfiguration can accelerate the performance of implementation circuits. Such dynamic reconfiguration requires two important features: fast reconfiguration and numerous reconfiguration contexts. However, fast reconfiguration and numerous reconfiguration contexts share a trade-off relation on current VLSIs. Therefore, Optically Reconfigurable Gate Arrays (ORGAs) have been developed to resolve this dilemma. An ORGA architecture allows many configuration contexts by exploiting the large storage capacity of a holographic memory and fast reconfiguration using wide-bandwidth optical connections between a holographic memory and a programmable gate array VLSI. In addition, Dynamic Optically Reconfigurable Gate Arrays (DORGAs) using a photodiode memory architecture have already been developed to realize a high-gate-density VLSI. Therefore, this article presents the first demonstration of a nanosecond-order configuration of a nine-context DORGA architecture. Moreover, this article presents a proposal of a reconfiguration period adjustment technique to control each reconfiguration period to its best setting.

Fast Optical Reconfiguration of a Nine-Context DORGA Using a Speed Adjustment Control

This paper presents a proposal for a high-speed scrubbing method based on an optically reconfigurable gate array (ORGA) architecture. A salient concern for current field programmable gate arrays (FPGAs) used in high-radiation environments is the high frequency of soft-errors occurring on their configuration memories. Even if triple modular redundancy is used for implementations on FPGAs, soft-error tolerance issues on the configuration memories cannot be alleviated. This paper therefore presents a high-speed scrubbing method that is applicable to ORGA architectures, in addition to its experimental demonstration on an ORGA-VLSI. The mean time between soft-errors (MTBF) on the ORGA configuration memory has been analyzed theoretically: the MTBF can be extended to 1.35–1.89 million times longer than those of current FPGAs.

High-speed scrubbing demonstration using an optically reconfigurable gate array.

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New Developments in Liquid Crystals

We propose an optical buffering technique for a programmable gate array under a space radiation environment. The technique allows rapid recovery of a programmable device that is damaged by high-energy charged particles. The technique uses invalid configuration data, including error bits that have already been damaged by the particles, while the configuration data are transferred using wireless communications and are retained on electronically erasable, programmable read-only, or static random-access-memory devices.

Optical buffering technique under a space radiation environment

To date, optically reconfigurable gate arrays (ORGAs) have been developed to realize large virtual gates and to increase gate array performance by combining a holographic memory with a programmable gate array. Among such studies, a 16-context ORGA architecture with nanosecond-order reconfiguration capability has already been demonstrated. However, its reconfiguration contexts are too few to execute large real-time operations. This paper therefore presents a proposal of a more advanced 100-context ORGA architecture in addition to related experimental results.

Mao Nakajima

Papers

Optical buffering technique under a space radiation environment

Dynamic optically reconfigurable gate array very large-scale integration with partial reconfiguration capability

Fast Optical Reconfiguration of a Nine-Context DORGA Using a Speed Adjustment Control

A 100-context optically reconfigurable gate array

Optical buffering technique under space radiation environment