A software system is disclosed which facilitates the process of tracing the execution paths of a program, called the client. The tracing is performed without requiring modifications to the executable or source code files of the client. Trace data collected during the tracing operation is collected according to instructions in a trace options file. At run time, the tracing library attaches to the memory image of the client. The tracing library is configured to monitor execution of the client and to collect trace data, based on selections in the trace options file. The developer then uses a trace analyzer program, also having a graphical user interface, to view the trace information. The system can trace multiple threads and multiple processes. The tracing library is preferably configured to runs in the same process memory space as the client thereby tracing the execution of the client program without the need for context switches. The tracing system provides a remote mode and an online mode. In remote mode, the developer sends the trace control information to a remote user site together with a small executable image called the agent that enables a remote customer, to generate a trace file that represents execution of the client application at the remote site. In online mode, the developer can generate trace options, run and trace the client, and display the trace results in near real-time on the display screen during execution of the client program.

System and method for monitoring and analyzing the execution of computer programs

A software system is disclosed which facilitates the process of tracing the execution paths of a program, called the client. The tracing is performed without requiring modifications to the executable or source code files of the client. Trace data collected during the tracing operation is collected according to instructions in a trace options file. At run time, the tracing library attaches to the memory image of the client. The tracing library is configured to monitor execution of the client and to collect trace data, based on selections in the trace options file. Conditional tracing, through the use of triggers and actions taken in response to the triggers, allows the developer to control the tracing operation. The triggers can be conditional triggers in which the corresponding action is taken only if a conditional expression is satisfied. The system can trace multiple threads and multiple processes. The tracing system provides a remote mode and an online mode. In remote mode, the developer sends the trace control information (which can include triggers and corresponding actions) to a remote user site together with a small executable image called the agent that enables a remote customer, to generate a trace file that represents execution of the client application at the remote site. In online mode, the developer can generate trace options (including triggers and corresponding actions), run and trace the client, and display the trace results in near real-time on the display screen during execution of the client program.

System and method for conditional tracing of computer programs

A method and circuit adaptively adjust the timing offset of a digital signal relative to a clock signal output coincident with that digital signal to enable a latch receiving the digital signal to store the digital signal responsive to the clock signal. The digital signal is applied to the latch, and stored in the latch responsive to the clock signal. The digital signal stored in the latch is evaluated to determine if the stored digital signal has an expected value. The timing offset of the digital signal is thereafter adjusted relative to the clock signal. and the digital signal is once again stored in the latch responsive to the clock signal at the new timing offset. A number of digital signals at respective timing offsets relative to the clock signal are stored and evaluated, and a final timing offset of the digital signal is selected from the ones of the timing offsets that cause the latch to store the digital signal having the expected value. The timing offset of the digital signal is thereafter adjusted to the selected final timing offset. A read synchronization circuit may adaptively adjust the timing offset of digital signals in this manner, and such a read synchronization circuit may be utilized in many types of integrated circuits, including packetized dynamic random access memories, memory systems including a memory controller and one or more such packetized dynamic random access memories, and in computer systems including a plurality of such packetized dynamic random access memories.

Method and apparatus for adaptively adjusting the timing offset between a clock signal and digital signals transmitted coincident with that clock signal, and memory device and system using same

A software system is disclosed that provides remote troubleshooting and tracing of the execution of computer programs. The software system allows a remote software developer or help desk person to troubleshoot computer environment and installation problems such as missing or corrupted environment variables, files, DLLs, registry entries, and the like. In one embodiment the software system includes an information-gathering module that gathers run-time information about program execution, program interaction with the operating system and the system resources. The information-gathering module also monitors user actions and captures screen output. The information-gathering module passes the gathered information to an information-display module. The information-display module allows a support technician (e.g., a software developer, a help desk person, etc.) to see the user interactions with the program and corresponding reactions of the system. In one embodiment, the information-display module allows the support technician to remotely view environment variables, file access operations, system interactions, and user interactions that occur on the user's computer and locate failed operations that cause execution problems

System and method for software diagnostics using a combination of visual and dynamic tracing

A software system is disclosed which facilitates the process of tracing the execution paths of a program, called the client The tracing is performed without requiring modifications to the executable or source code files of the client Trace data collected during the tracing operation is collected according to instructions in a trace options file At run time, the tracing library attaches to the memory image of the client The tracing library is configured to monitor execution of the client and to collect trace data, based on selections in the trace options file The developer then uses a trace analyzer program, also having a graphical user interface, to view the trace information The system can trace multiple threads and multiple processes The tracing library is preferably configured to runs in the same process memory space as the client thereby tracing the execution of the client program without the need for context switches The tracing system provides a remote mode and an online mode In remote mode, the developer sends the trace control information to a remote user site together with a small executable image called the agent that enables a remote customer, to generate a trace file that represents execution of the client application at the remote site In online mode, the developer can generate trace options, run and trace the client, and display the trace results in near real-time on the display screen during execution of the client program

System and method for remotely analyzing the execution of computer programs

A dedicated debugging facility for tracing hardware and software faults in a distributed digital system. An event data capture circuit is integrated into each processing node in a distributed multinode system for capturing event data within each node under software control. The captured event data is stored in one of a plurality of variable-length trace data buffers in the node processor memory space for analysis or transfer. These dedicated trace data acquisition circuits provide continuously available trace data for the hardware and software functions within each node. Each variable-length trace data entry is stored in the trace data buffers according to a format of this invention that permits collection and assembly of trace data entries from throughout the distributed multinode system to debug local hardware or software and to debug internodal interconnection hardware and software.

Distributed trace data acquisition system

A memory controller reads data from a memory bank of synchronous RAM during a small and variable data valid window, by compensating for delays in receiving the data caused by memory loading, chip and card manufacturing process variations, and the like. The memory controller includes a system clock driver to supply the memory bank with a clock reference signal. A sampling clock provides an assortment of sampling clock signals duplicative of the system clock signal, with various delays. A command driver initiates Read operations in the memory bank by relaying Read command signals to the memory bank. In response to the level of memory loading, such as the number of memory modules present in the memory bank, a clock selector directs a selected one of the sampling clock signals to a delay module, which replicates any delay the system clock driver may have. If desired, an additional, user-selectable supplementary delay unit may be used to increase the delay provided by the delay module, thereby increasing or offsetting the delay of the selected sampling clock signal. The delay module provides a delayed clock signal to synchronize receipt of Read data signals from the memory bank at a clocked latch, enabling the latch to receive the Read data signals during the appropriate data valid window. Specifically, the latch is activated by receipt of Read command signals, which may be coordinated, for example, with the rising edge of the delayed clock signal. The latched Read data signals are then available for use by other logic circuitry.

Memory controller for reading data from synchronous RAM

Processing test results from a plurality of individual semiconductor testers by analyzing each test result at an adaptive test engine. A centralized system jointly analyzes all the test results from the plurality of individual semiconductor testers. The adaptive test engine or the centralized system identifies, based on the analysis of each test result or the joint analysis of all the test results, one or more of: a test environmental issue, a tester variability issue, a tester calibration issue, a product variability issue, and a manufacturing process variability issue. The adaptive test engine or the centralized system determines whether one or more of the plurality of individual semiconductor testers causes one or more of the identified issues or whether semiconductor products tested by the plurality of individual semiconductor testers causes one or more of the identified issues.

Integrated cross-tester analysis and real-time adaptive test

The present invention describes a method and system for optimizing a test flow within each ATE (Automated Test Equipment) station. The test flow includes a plurality of test blocks. A test block includes a plurality of individual tests. A computing system schedule the test flow based one or more of: a test failure model, test block duration and a yield model. The failure model determines an order or sequence of the test blocks. There are at least two failure models: independent failure model and dependant failure model. The yield model describes whether a semiconductor chip is defective or not. Upon completing the scheduling, the ATE station conducts tests according to the scheduled test flow. The present invention can also be applied to software testing.

Optimal test flow scheduling within automated test equipment for minimized mean time to detect failure

An apparatus, system, and method are provided for managing errors in prefetched data. The apparatus, system, and method identify prefetched data that contains an uncorrectable error. In addition, the apparatus, system, and method initiate an error recovery process only for prefetched data that is actually used by a requesting device, module, or application. The apparatus includes a prefetch module that prefetches data packets, a validation module that determines whether a prefetched data packet contains an uncorrectable error, a transfer module that transfers prefetched data packets to a requester, and an error recovery module that selectively initiates error recovery for those data packets that contain an uncorrectable error and are actually transferred to the requester.

Mark C. Johnson

Papers

Distributed trace data acquisition system

Memory controller for reading data from synchronous RAM

Integrated cross-tester analysis and real-time adaptive test

Optimal test flow scheduling within automated test equipment for minimized mean time to detect failure

Apparatus, system, and method for managing errors in prefetched data