The ever increasing requirements for electrical performance of on-chip wiring has driven three major technological advances in recent years. First, copper has replaced Aluminum as the new interconnect metal of choice, forcing also the introduction of damascene processing. Second, alternatives for SiO2 with a lower dielectric constant are being developed and introduced in main stream processing. The many new resulting materials needs to be classified in terms of their materials characteristics, evaluated in terms of their properties, and tested for process compatibility. Third, in an attempt to lower the dielectric constant even more, porosity is being introduced into these new materials. The study of processes such as plasma interactions and swelling in liquid media now becomes critical. Furthermore, pore sealing and the deposition of a thin continuous copper diffusion barrier on a porous dielectric are of prime importance. This review is an attempt to give an overview of the classification, the character...

Low dielectric constant materials for microelectronics

The present invention provides a heterocyclic compound and an organic light-emitting device including the heterocyclic compound. The organic light-emitting devices using the heterocyclic compounds have high-efficiency, low driving voltage, high luminance and long lifespan.

Organic light-emitting device

Power semiconductor devices are key components in power conversion systems. Silicon carbide (SiC) has received increasing attention as a wide-bandgap semiconductor suitable for high-voltage and low-loss power devices. Through recent progress in the crystal growth and process technology of SiC, the production of medium-voltage (600?1700 V) SiC Schottky barrier diodes (SBDs) and power metal?oxide?semiconductor field-effect transistors (MOSFETs) has started. However, basic understanding of the material properties, defect electronics, and the reliability of SiC devices is still poor. In this review paper, the features and present status of SiC power devices are briefly described. Then, several important aspects of the material science and device physics of SiC, such as impurity doping, extended and point defects, and the impact of such defects on device performance and reliability, are reviewed. Fundamental issues regarding SiC SBDs and power MOSFETs are also discussed.

https://iopscience.iop.org/article/10.7567/JJAP.54.040103/pdf

Material science and device physics in SiC technology for high-voltage power devices

Modern computer microprocessor chips are marvels of engineering complexity. For the current 45 nm technology node, there may be nearly a billion transistors on a chip barely 1 cm2 and more than 10 000 m of wiring connecting and powering these devices distributed over 9-10 wiring levels. This represents quite an advance from the first INTEL 4004B microprocessor chip introduced in 1971 with 10 μm minimum dimensions and 2 300 transistors on the chip! It has been disclosed that advanced microprocessor chips at the 32 nm node will have more than 2 billion transistors.1 For instance, Figure 1 shows a sectional 3D image of a 90 nm IBM microprocessor, containing several hundred million integrated devices and 10 levels of interconnect wiring, designated as the back-end-of-the-line (BEOL). Since the invention of microprocessors, the number of active devices on a chip has been exponentially increasing, approximately doubling every two years. This trend was first described in 1965 by Gordon Moore,2 although the original discussion suggested doubling the number of devices every year, and the phenomenon became popularly known as Moore’s Law. This progress has proven remarkably resilient and has persisted for more than 50 years. The enabler that has permitted these advances is known as scaling, that is, the reduction of minimum device dimensions by lithographic advances (photoresists, tooling, and process integration optimization) by ∼30% for each device generation.3 It allowed more active devices to be incorporated in a given area and improved the operating characteristics of the individual transistors. It should be emphasized that the earlier improvements in chip performance were achieved with very few changes in the materials used in the construction of the chips themselves. The increase of performance with scaling * Corresponding author. E-mail: gdubois@us.ibm.com. † IBM Almaden Research Center. ‡ Stanford University. Willi Volksen received his B.S. in Chemistry (magna cum laude) from New Mexico Institute of Mining and Technology in 1972 and his Ph.D. in Chemistry/Polymer Science from the University of Massachusetts, Lowell, in 1975. He then joined the research group of Prof. Harry Gray/Dr. Alan Rembaum at the California Institute of Technology as a postdoctoral fellow and upon completion of the one-year appointment joined Dr. Rembaum at the Jet Propulsion Laboratory as a Senior Chemist in 1976. In 1977 Dr. Volksen joined the IBM Research Division at the IBM Almaden Research Center in San Jose, CA, where he is an active research staff member in the Advanced Materials Group of the Science and Technology function.

Low dielectric constant materials.

Provided is an organic electroluminescence device having high luminous efficiency, high heat resistance and an extremely long lifetime. The organic electroluminescence device of the present invention includes an organic thin film layer composed of one or more layers containing at least a light emitting layer is interposed between a cathode and an anode. The light emitting layer includes a compound containing a condensed ring and a luminescent metal complex capable of emitting light having a red-based color. It is preferable that the compound containing a condensed ring includes a host material, while the luminescent metal complex capable of emitting light having a red-based color includes a phosphorescent dopant.

Organic Electroluminescent Device

This invention pertains to a method for producing hydrogenated silicon oxycarbide (H:SiOC) films having low dielectric constant. The method comprises reacting an methyl-containing silane in a controlled oxygen environment using plasma enhanced or ozone assisted chemical vapor deposition to produce the films. The resulting films are useful in the formation of semiconductor devices and have a dielectric constant of 3.6 or less.

Method for producing hydrogenated silicon oxycarbide films having low dielectric constant

Ultralarge sale integrated circuit designs require multiple metal wiring layers for the formation of the device interconnections. Surface planarization and the deposition of high quality insulating films are critical fabrication steps related to the manufacture of these circuits. Planarization and dielectric deposition can be accomplished simultaneously using a spin-on process with hydrogen silsesquioxane (HSQ) resin to deposit amorphous SiO:H dielectric films. The use of this material in device manufacturing has increased as a result of the material's good planarization properties, eliminating the need for etchback procedures. More recently, it has been observed that HSQ-based films also provide the added benefit of relative permittivity less than SiO 2 , which helps to minimize electrical delay. In order to obtain optimum properties from this material, tight process control and knowledge of the material's chemical behavior are necessary. Studies of the precursor material, film formation, and film properties have been performed. Also it is found that structural and compositional changes in the precursor during the film forming process play an important role in establishing the beneficial properties observed in HSQ-based dielectric films.

Properties of a ‐ SiO x : H Thin Films Deposited from Hydrogen Silsesquioxane Resins

Methods for manufacturing silicon carbide wafers having superior specifications for bow, warp, total thickness variation (TTV), local thickness variation (LTV), and site front side least squares focal plane range (SFQR). The resulting SiC wafer has a mirror-like surface that is fit for epitaxial deposition of SiC. The specifications for bow, warp, total thickness variation (TTV), local thickness variation (LTV), and site front side least squares focal plane range (SFQR) of the wafer are preserved following the addition of the epitaxy layer.

Flat sic semiconductor substrate

New solutions for intermetal dielectrics using trimethylsilane-based PECVD processes

Disclosed is the use of silicon carbide as a barrier layer to prevent the diffusion of metal atoms between adjacent conductors separated by a dielectric material. This advancement allows for the use of low resistivity metals and low dielectric constant dielectric layers in integrated circuits and wiring boards.

Mark J. Loboda

Papers

Method for producing hydrogenated silicon oxycarbide films having low dielectric constant

Properties of a ‐ SiO x : H Thin Films Deposited from Hydrogen Silsesquioxane Resins

Flat sic semiconductor substrate

New solutions for intermetal dielectrics using trimethylsilane-based PECVD processes

Silicon carbide metal diffusion barrier layer