In this paper, we propose a design method for low-power self-timed combinational circuits and latches based on the 1-out-of-4 encoding method. We propose a 1-out-of-4 latch circuit using standard cell libraries in order to establish a semi-custom low-power self-timed design style. The energy consumption of the proposed circuits is about 18% average smaller than that of conventional dual-rail encoded circuits.

A design method for 1-out-of-4 encoded low-power self-timed circuits using standard cell libraries

We propose and implement a four-phase handshake protocol for bundled-data asynchronous circuits with consideration given to power consumption and area. A key aspect is that our protocol uses three phases for generating the matched delay to signal the completion of the data-path stage operation whereas conventional methods use only one phase. A comparison with other protocols at 0.18 μm process showed that our protocol realized lower power consumption than any other protocol at cycle times of 1.2 ns or more. The area of the delay generator required for a given data-path delay was less than half that of other protocols. The overhead of the timing generator was the same as or less than that of other protocols.

Masakazu Shimizu

Papers

A Cost-Effective Handshake Protocol and Its Implementation for Bundled-Data Asynchronous Circuits