Matthew C. Merten

TL;DR: A novel hardware-based approach for identifying, profiling, and monitoring hot spots in order to support runtime optimization of general purpose programs using a set of tightly coupled hardware tables and control logic modules placed in the retirement stage of a processor pipeline removed from the critical path is presented.

TL;DR: A microarchitecture scheme which detects and adapts to varying spatial locality, dynamically adjusting the amount of data fetched on a cache miss is presented, showing significant speedups in detailed simulations of several integer programs.

TL;DR: The primary goals for the Haswell program are platform integration and low power to enable smaller form factors and an Intel AVX2 instruction set that supports floating-point multiply-add (FMA), and 256b SIMD integer achieving 2× the number of floating- point and integer operations over its predecessor.

TL;DR: In this paper, a sleep-wakeup mechanism is used for compare and exchange operations using an instruction at a processor to help acquire a lock on behalf of the processor, and then the instruction is put to sleep until an event has occurred.

TL;DR: In this paper, a hot spot detection counter is used to track non-hot spot branches and hot spot candidate branches and when hot-spot candidate branches are frequently encountered compared to nonhot-spots candidate branches, the hot spot detector may notify the operating system and hot-spaces candidate branch addresses may be supplied to a runtime optimizing compiler and a monitor table or a hotspot monitor.