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Srinivas Chennupaty

Researcher at Intel

Publications -  25
Citations -  1578

Srinivas Chennupaty is an academic researcher from Intel. The author has contributed to research in topics: Operand & Encryption. The author has an hindex of 11, co-authored 25 publications receiving 1541 citations.

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Proceedings ArticleDOI

Debunking the 100X GPU vs. CPU myth: an evaluation of throughput computing on CPU and GPU

TL;DR: This paper discusses optimization techniques for both CPU and GPU, analyzes what architecture features contributed to performance differences between the two architectures, and recommends a set of architectural features which provide significant improvement in architectural efficiency for throughput kernels.
Patent

Instruction set extension using prefixes

TL;DR: In this article, a method and apparatus for encoding an instruction in an instruction set which uses a prefix code to qualify an existing opcode of an existing instruction is described. But this method requires the prefix code and the opcode to be different from each other.
Proceedings ArticleDOI

5.9 Haswell: A family of IA 22nm processors

TL;DR: The primary goals for the Haswell program are platform integration and low power to enable smaller form factors and an Intel AVX2 instruction set that supports floating-point multiply-add (FMA), and 256b SIMD integer achieving 2× the number of floating- point and integer operations over its predecessor.
Patent

Gathering and Scattering Multiple Data Elements

TL;DR: In this paper, a single instruction specifying a transfer operation for a plurality of data elements between a first storage location and a second storage location is presented, followed by an exception handler delivering pending traps or interrupts to the exception handler prior to delivering the exception.