M
Michael Garland
Researcher at Nvidia
Publications - 131
Citations - 18564
Michael Garland is an academic researcher from Nvidia. The author has contributed to research in topics: CUDA & Polygon mesh. The author has an hindex of 50, co-authored 120 publications receiving 17536 citations. Previous affiliations of Michael Garland include Carnegie Mellon University & University of Virginia.
Papers
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Proceedings ArticleDOI
Optimizing Sparse Matrix Operations on GPUs Using Merge Path
TL;DR: This paper develops a parallel processing scheme to compute segmented row-wise operations on sparse matrices that exposes parallelism at the granularity of individual nonzero entries and achieves competitive performance across many diverse problems while maintaining predictable behaviour dependent only on the computational work.
Patent
Ray tracing system, method, and computer program product for simultaneously traversing a hierarchy of rays and a hierarchy of objects
TL;DR: In this article, a ray tracing system, method, and computer program product are provided for simultaneously traversing a hierarchy of rays and a hierarchical of objects, based on the traversal.
Proceedings ArticleDOI
Policy-based tuning for performance portability and library co-optimization
TL;DR: This paper presents a policy-based design idiom for constructing reusable, tunable software components that can be co-optimized with the enclosing kernel for the specific problem and processor at hand, and enables flexible granularity coarsening.
Journal ArticleDOI
Novel Architectures: Solving Computational Problems with GPU Computing
J. Cohen,Michael Garland +1 more
TL;DR: Modern GPUs are massively parallel microprocessors that can deliver very high performance for the parallel computations common in science and engineering.
Book ChapterDOI
Sparse Matrix-Vector Multiplication on Multicore and Accelerators
TL;DR: Jack Dongarra, David A. Bader, Jakub Kurzak Scientific Computing with Multicore and Accelerators