A unified algorithm for elementary functions

Elements of Numerical Analysis. By Peter Hekrici. 1964. (John Wiley & Sons)

Unum type-II based Sets-Of-Real-Numbers (SORN) arithmetic is a recently proposed, promising number representation providing fast and low complex implementations of arithmetic operations at the expense of low resolution. The format can be applied for constraining large optimization problems by means of preprocessing. In this work SORN arithmetic is applied for reducing the latency of a Sphere Decoder by excluding a number of solutions in advance. In particular, a comprehensive hardware implementation is presented, consisting of an adapted Sphere Decoder, as well as SORN and matrix preprocessing. Logic and physical synthesis evaluations show that the mean number of visited nodes within the Sphere Decoder can be reduced by up to 76%, resulting in an overall latency reduction of up to 20%. This improvement comes with an area and energy increase of up to 58% and 83%, respectively, compared to a standard Schnorr-Euchner Sphere Decoder.

Hardware Implementation of a Latency-Reduced Sphere Decoder With SORN Preprocessing

In this paper different SORN (Sets Of Real Numbers) datatype configurations are analyzed for unum type-2-based arithmetic applied to symbol detection in a wireless MIMO communication system. Different SORN interval properties and MIMO-specific performance measures as well as the corresponding hardware architectures are evaluated in order to rate the suitability of the different configurations for the target application. The evaluation of the proposed datatypes indicates an improvement in the solution set reduction of up to 95.4 % and a hardware complexity reduction of 30.3 % comparing the proposed 17 bit configuration to the original unum type-2-based 16 bit SORNs.

Application-Specific Analysis of Different SORN Datatypes for Unum Type-2-Based Arithmetic

Recently, the wireless commuication system development driven by the ongoing Industry 4.0 (I40) and Indusrial Internet of Thing (IIoT) has been growing enormously. In industrial automation and manufacturing, closed-loop control applications are commonly used, which require completely new solutions to achieve latencies of 1ms with extremely high reliability and stringent requirements on message timing and repetitive packet losses. A hardware-based solution for baseband signal processing aiming at such challenges is introduced in this work. With a novel design and integration of the baseband signal processing blocks, the key highlights of this solution are a) multi-user support, b) simple and flexible integration in the industrial application, c) low hardware overhead, and d) high data throughput with low latency.

FPGA-based Baseband Solution for High Performance Industrial Wireless Communication

In this paper a new approach for a fast and low-precision number format is explored. The SORN representation uses a fixed set of exact values and open intervals in between to represent real numbers on the digital layer. With SORN arithmetic operations can be carried out using simple lookup tables which results in a very fast and low-complex way of computing. The new arithmetic is applied to an exhaustive search algorithm for maximum likelihood symbol detection in a MIMO transmission environment. The algorithm is implemented in hardware and executed on a Zynq-7000 FPGA. It is shown that the amount of possible solutions for the symbol detection can be reduced by up to 80% using the fast SORN architecture as a preprocessing stage for classic solvers.

SORN Arithmetic for MIMO Symbol Detection - Exploration of the Type-2 Unum Format

This paper describes a novel design method for direct digital frequency synthesizers with very high accuracy. To this end, we leverage the well-known piecewise, multiplier-less function approximation method by two separate enhancements: A parallel function estimation scheme is applied which increases the approximation accuracy and reduces the segmentation effort. To achieve further performance improvement, gradient encoding is also taken into account. For evaluation, several direct digital frequency synthesizer architectures with varying accuracies are generated and analyzed in terms of complexity and timing. Logic and physical synthesis is performed with selected candidates. The results indicate the proposed function approximation technique as a powerful approach for the design of direct digital frequency synthesizers with spurious free dynamic ranges of 90dBc and more.

On high-accuracy direct digital frequency synthesis using linear function approximation

This article provides an efficient hardware generator for high-performance sets-of-real-numbers (SORNs) arithmetic. Complex datapaths are automatically built in VHDL, comprising the generation of arithmetic operations and functions as well as all necessary interconnects. Various SORN datatypes can be easily set up enabling high adaptivity to different applications. For further performance improvements additional optimization and implementation techniques are considered as well. For evaluation, a SORN-based symbol detector for a multiantenna wireless communication scenario is generated that solves a system of linear equations. As SORN-based signal processing allows a quick but rough calculation of the system equations outcome, it can be exploited to reject possible input vectors that do not satisfy the general constraints of the signal detection task. Hence, this generally leads to a heavily reduced set of remaining solutions. Multiple hardware architectures with different SORN datatypes are generated and compared. Further, an analysis is performed considering the signal-to-noise ratio (SNR). Finally, logic synthesis is applied to selected designs and compared to references from the literature highlighting this article to be highly hardware-efficient and suitable for application-specific signal processing.

Moritz Barthel

Papers

Hardware Implementation of a Latency-Reduced Sphere Decoder With SORN Preprocessing

SORN Arithmetic for MIMO Symbol Detection - Exploration of the Type-2 Unum Format

Application-Specific Analysis of Different SORN Datatypes for Unum Type-2-Based Arithmetic

On high-accuracy direct digital frequency synthesis using linear function approximation

A Hardware Generator for SORN Arithmetic