Muhammad Mohsin Ghaffar

TL;DR: This paper presents the first systematic exploration of this design space as a function of precision for Bidirectional Long Short-Term Memory (BiLSTM) neural network, and provides the first open source HLS library extension of FINN for parameterizable hardware architectures of LSTM layers on FPGAs which offers full precision flexibility and allows for parameterized performance scaling.

TL;DR: This work presents a novel PIM based Binary Weighted Network (BWN) inference accelerator design that is inline with the commodity Dynamic Random Access Memory (DRAM) design and process and is extremely energy efficient.

TL;DR: In this paper, the authors presented an end-to-end framework for forest estimation and change analysis using deep convolution neural network-based semantic segmentation to process multi-spectral space-borne images to quantitatively monitor the forest cover change patterns.

TL;DR: In this article, the authors proposed a novel DRAM-based PIM architecture for quantized (8-bit weight and input) CNN inference by utilizing the complexity reduction offered by fast convolution algorithms.

TL;DR: This paper presents a hybrid hardware-software FPGA-based accelerator that outperforms the existing anyOCR software implementation running on i7-4790T in terms of runtime by factor of 21, while achieving energy efficiency of 10 Images/J that is higher than that achieved by low power embedded processors with negligible loss of recognition accuracy.