C
Christian Weis
Researcher at Kaiserslautern University of Technology
Publications - 109
Citations - 1638
Christian Weis is an academic researcher from Kaiserslautern University of Technology. The author has contributed to research in topics: Dram & Memory controller. The author has an hindex of 24, co-authored 100 publications receiving 1367 citations. Previous affiliations of Christian Weis include Siemens & Qimonda.
Papers
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Proceedings ArticleDOI
Exploiting expendable process-margins in DRAMs for run-time performance optimization
Karthik Chandrasekar,Sven Goossens,Christian Weis,Martijn Koedam,Benny Akesson,Norbert Wehn,Kees Goossens +6 more
TL;DR: A generic post-manufacturing performance characterization methodology for DRAMs is proposed that identifies this excess in process-margins for any given DRAM device at runtime, while retaining the requisite margins for voltage (noise) and temperature variations.
Posted Content
The gem5 Simulator: Version 20.0+
Jason Lowe-Power,Abdul Ahmad,Adria Armejach,Adrian Herrera,Alec Roelke,Amin Farmahini-Farahani,Andrea Mondelli,Andreas Hansson,Andreas Sandberg,Anthony Gutierrez,Austin Harris,Ayaz Akram,Bagus Hanindhito,Binh Pham,Bobby R. Bruce,Boris Shingarov,Brad Beckmann,Carlos Escuin,Christian Menard,Christian Weis,Daniel Rodrigues Carvalho,Darien Wood,Dibakar Gope,Éder F. Zulian,Gabe Black,Gedare Bloom,Giacomo Travaglini,Hamidreza Khaleghzadeh,Hanhwi Jang,Hoa Nguyen,Hongil Yoon,Ilias Vougioukas,Javier Setoain,Jayneel Gandhi,Jeronimo Castrillon,Krishnendra Nathella,Lena E. Olson,Lizhong Chen,Mahyar Samani,Marc S. Orr,Marjan Fariborz,Matteo Andreozzi,Matthew D. Sinclair,Matthew James Horsnell,Matthias Jung,Michael Upton,Miquel Moreto,Mohammad Alian,Nicolas Derumigny,Nikos Nikoleris,Nilay Vaish,Nils Asmussen,Norbert Wehn,Omar Naji,Pablo Prieto,Pouya Fotouhi,Radhika Jagtap,Rahul Thakur,Raza Jafri,Reiley Jeyapaul,Rico Amslinger,Ryan Gambord,Srikant Bharadwaj,Stephan Diestelhorst,Subash Kannoth,Swapnil Haria,Syed Ali,Thomas Grass,Tiago Muck,Timothy Hayes,Timothy M. Jones,Tommaso Marinelli,Trivikram Reddy,Tuan Ta,Tushar Krishna,Wendy Arnott Elsasser,William S.-Y. Wang,Yuetsu Kodama,Zhengrong Wang +78 more
TL;DR: How the gem5 simulator has transitioned to a formal governance model to enable continued improvement and community support for the next 20 years of computer architecture research is discussed.
Proceedings ArticleDOI
Energy and performance exploration of accelerator coherency port using Xilinx ZYNQ
TL;DR: This is the first work which represents detailed practical comparisons on the speed and energy efficiency of various processor-accelerator memory sharing techniques in a configurable heterogeneous platform.
Patent
Memory module for use in memory system, has control circuit connected with scheduling circuit to adjust resistance value depending on received control command signal and to schedule connection
TL;DR: In this paper, a control circuit is arranged in order to select one of the scheduling resistances, which is used to adjust the resistance value based on the control command signal and to schedule the connection.
Proceedings ArticleDOI
Design space exploration for 3D-stacked DRAMs
TL;DR: The exploration demonstrates that an optimized 1Gbit 3D-DRAM stack is 15× more energy efficient compared to a commodity Low-Power DDR SDRAM part without IO drivers and pads.