High-performance parallel computer architecture and systems have been improved at a phenomenal rate. In the meantime, VLSI computer-aided design (CAD) software for multibillion-transistor IC design has become increasingly complex and requires prohibitively high computational resources. Recent studies have shown that, numerous CAD problems, with their high computational complexity, can greatly benefit from the fast-increasing parallel computation capabilities. However, parallel programming imposes big challenges for CAD applications. Fully exploiting the computational power of emerging general-purpose and domain-specific multicore/many-core processor systems, calls for fundamental research and engineering practice across every stage of parallel CAD design, from algorithm exploration, programming models, design-time and run-time environment, to CAD applications, such as verification, optimization, and simulation. This journal special section will cover recent progress on parallel CAD research, including algorithm foundations, programming models, parallel architectural-specific optimization, and verification. More specifically, papers with in-depth and extensive coverage of the following topics will be considered, as well as other topics relevant to the design of parallel CAD algorithms and software tools. 1. Parallel algorithm design and specification for CAD applications 2. Parallel programming models and languages of particular use in CAD 3. Runtime support and performance optimization for CAD applications 4. Parallel architecture-specific design and optimization for CAD applications 5. Parallel program debugging and verification techniques particularly relevant for CAD The papers should be submitted via the Manuscript Central website and should adhere to standard ACM TODAES formatting requirements (http://todaes.acm.org/). The page count limit is 25.

Parallel CAD: Algorithm Design and Programming Special Section Call for Papers TODAES: ACM Transactions on Design Automation of Electronic Systems

OBJECTIVE: To estimate the global burden of cholera using population-based incidence data and reports. METHODS: Countries with a recent history of cholera were classified as endemic or non-endemic, depending on whether they had reported cholera cases in at least three of the five most recent years. The percentages of the population in each country that lacked access to improved sanitation were used to compute the populations at risk for cholera, and incidence rates from published studies were applied to groups of countries to estimate the annual number of cholera cases in endemic countries. The estimates of cholera cases in non-endemic countries were based on the average numbers of cases reported from 2000 to 2008. Literature-based estimates of cholera case-fatality rates (CFRs) were used to compute the variance-weighted average cholera CFRs for estimating the number of cholera deaths. FINDINGS: About 1.4 billion people are at risk for cholera in endemic countries. An estimated 2.8 million cholera cases occur annually in such countries (uncertainty range: 1.4-4.3) and an estimated 87 000 cholera cases occur in non-endemic countries. The incidence is estimated to be greatest in children less than 5 years of age. Every year about 91 000 people (uncertainty range: 28 000 to 142 000) die of cholera in endemic countries and 2500 people die of the disease in non-endemic countries. CONCLUSION: The global burden of cholera, as determined through a systematic review with clearly stated assumptions, is high. The findings of this study provide a contemporary basis for planning public health interventions to control cholera.

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The global burden of cholera

Cholera outbreak following the earthquake of 2010 in Haiti has reaffirmed that the disease is a major public health threat. Vibrio cholerae is autochthonous to aquatic environment, hence, it cannot be eradicated but hydroclimatology-based prediction and prevention is an achievable goal. Using data from the 1800s, we describe uniqueness in seasonality and mechanism of occurrence of cholera in the epidemic regions of Asia and Latin America. Epidemic regions are located near regional rivers and are characterized by sporadic outbreaks, which are likely to be initiated during episodes of prevailing warm air temperature with low river flows, creating favorable environmental conditions for growth of cholera bacteria. Heavy rainfall, through inundation or breakdown of sanitary infrastructure, accelerates interaction between contaminated water and human activities, resulting in an epidemic. This causal mechanism is markedly different from endemic cholera where tidal intrusion of seawater carrying bacteria from estuary to inland regions, results in outbreaks.

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Environmental Factors Influencing Epidemic Cholera

To increase productivity in designing digital hardware components, high-level synthesis (HLS) is seen as the next step in raising the design abstraction level. However, the quality of results (QoRs) of HLS tools has tended to be behind those of manual register-transfer level (RTL) flows. In this paper, we survey the scientific literature published since 2010 about the QoR and productivity differences between the HLS and RTL design flows. Altogether, our survey spans 46 papers and 118 associated applications. Our results show that on average, the QoR of RTL flow is still better than that of the state-of-the-art HLS tools. However, the average development time with HLS tools is only a third of that of the RTL flow, and a designer obtains over four times as high productivity with HLS. Based on our findings, we also present a model case study to sum up the best practices in comparative studies between HLS and RTL. The outcome of our case study is also in line with the survey results, as using an HLS tool is seen to increase the productivity by a factor of six. In addition, to help close the QoR gap, we present a survey of literature focused on improving HLS. Our results let us conclude that HLS is currently a viable option for fast prototyping and for designs with short time to market.

Are We There Yet? A Study on the State of High-Level Synthesis

The discrete cosine transform (DCT), introduced by Ahmed, Natarajan and Rao, has been used in many applications of digital signal processing, data compression and information hiding. There are four types of the discrete cosine transform. In simulating the discrete cosine transform, we propose a generalized discrete cosine transform with three parameters, and prove its orthogonality for some new cases. A new type of discrete cosine transform is proposed and its orthogonality is proved. Finally, we propose a generalized discrete W transform with three parameters, and prove its orthogonality for some new cases. Keywords: Discrete Fourier transform, discrete sine transform, discrete cosine transform, discrete W transform Nigerian Journal of Technological Research , vol7(1) 2012

On discrete cosine transform

An outbreak of cholera caused by Vibrio cholerae O1 Ogawa occurred in and around Chandigarh during July 22-31, 2002. Of the 303 patients admitted to two hospitals, 82 were confirmed by culture. Two rehabilitation colonies located at the periphery of Chandigarh were mainly affected. The isolates were biotyped as Eltor and were susceptible to many antibiotics. Thirty one (35.2%) of 88 water samples showed evidence of faecal contamination. The survey of the area revealed sewage contamination of the drinking water supply. The outbreak was controlled by providing safe drinking water to the people and correcting the defects in the sewage and water pipelines.

A recent outbreak of cholera due to Vibrio cholerae O1 Ogawa in & around Chandigarh, North India.

Energy efficiency is a critical factor in mobile systems, and a significant body of recent research efforts has focused on reducing the energy dissipation in mobile hardware and applications. The Android OS Power Manager provides programming interface routines called wakelocks for controlling the activation state of devices on a mobile system. An appropriate placement of wakelock acquire and release functions in the application can make a significant difference to the energy consumption. In this paper, we propose a data flow analysis based strategy for determining the placement of wakelock statements corresponding to the uses of devices in an application. Our experimental evaluation on a set of Android applications show significant (up to 32%) energy savings with the proposed optimization strategy.

Energy optimization in android applications through wakelock placement

Neem (Azadirachta indica) is a fast-growing and evergreen tree with various medicinal values. During a severe drought, it sheds off its leaves and also produces fruits. The available literature revealed that the seeds from neem fruits contained oil varying in the range of 25–45% oil load. Neem oil was extracted from the dried neem seeds by the soxhlet extraction method using petroleum ether as an efficient solvent. Neem seed oil-based alkyd resins were synthesized by the alcoholysis–polyesterification process. The progress of the reaction was examined by determining the acid value at various time intervals. Further characterization of the oil and resins for the determination of molecular weight, structure, fatty acid composition, surface morphology and thermal stability was carried out by gel permeation chromatography, nuclear magnetic resonance spectroscopy, Fourier transform infrared spectroscopy, gas chromatography–mass spectrometry, scanning electron microscopy, thermogravimetry and differential scanning calorimetry, respectively. Attempts were made to study the effect of maleic anhydride content in the resins that changed the curing, anticorrosion, wettability and thermal properties of the resins and cured films. The curing of the alkyd resins was done by blending it with epoxy resin by gradually increasing the temperature from 60 to 210 °C. The coating of the alkyd resins over mild steel plates showed superior corrosion protection for several days. The wettability of the cured films was evaluated by measuring the water contact angle (WCA). The resin with the higher percentage of maleic anhydride showed better performance in different paints and surface coating applications. The synthesized alkyd resins from the neem seed oil possessed great application potential in beneath water marine vessel finish that opposed salt corrosion.

Synthesis and characterization of neem (Azadirachta indica) seed oil-based alkyd resins for efficient anticorrosive coating application

Optimizations related to memory accesses and data storage make a significant difference to the performance and energy of a wide range of data-intensive applications. These techniques need to evolve with modern architectures supporting wide memory accesses. We investigate array interleaving, a data layout transformation technique that achieves energy efficiency by combining the storage of data elements from multiple arrays in contiguous locations, in an attempt to exploit spatial locality. The transformation reduces the number of memory accesses by loading the right set of data into vector registers, thereby minimizing redundant memory fetches. We perform a global analysis of array accesses, and account for possibly different array behavior in different loop nests that might ultimately lead to changes in data layout decisions for the same array across program regions. Our technique relies on detailed estimates of the savings due to interleaving, and also the cost of performing the actual data layout modifications. We also account for the vector register widths and the possibility of choosing the appropriate granularity for interleaving. Experiments on several benchmarks show a 6--34p reduction in memory energy due to the strategy.

Array Interleaving—An Energy-Efficient Data Layout Transformation

The Loop Unrolling optimization can lead to significant performance improvements in High Level Synthesis (HLS), but can adversely affect controller and datapath delays. Unrolling causes additional operations to be scheduled, possibly leading to increased resource sharing, thereby increasing the MUX sizes and delay. We use an estimation based approach to compute the best unroll factor for loops in a behavioral specification by combining a prediction of controller and datapath delays with search space pruning methods. Our exploration strategy gives highly accurate unroll factor results significantly faster than an exhaustive synthesis procedure.

Namita Sharma

Papers

A recent outbreak of cholera due to Vibrio cholerae O1 Ogawa in & around Chandigarh, North India.

Energy optimization in android applications through wakelock placement

Synthesis and characterization of neem (Azadirachta indica) seed oil-based alkyd resins for efficient anticorrosive coating application

Array Interleaving—An Energy-Efficient Data Layout Transformation

Exploration of Loop Unroll Factors in High Level Synthesis