The establishment of covalent junctions between carbon nanotubes (CNTs) and the modification of their straight tubular morphology are two strategies needed to successfully synthesize nanotube-based three-dimensional (3D) frameworks exhibiting superior material properties. Engineering such 3D structures in scalable synthetic processes still remains a challenge. This work pioneers the bulk synthesis of 3D macroscale nanotube elastic solids directly via a boron-doping strategy during chemical vapour deposition, which influences the formation of atomic-scale "elbowg" junctions and nanotube covalent interconnections. Detailed elemental analysis revealed that the "elbowg" junctions are preferred sites for excess boron atoms, indicating the role of boron and curvature in the junction formation mechanism, in agreement with our first principle theoretical calculations. Exploiting this materialĝ€™s ultra-light weight, super-hydrophobicity, high porosity, thermal stability, and mechanical flexibility, the strongly oleophilic sponge-like solids are demonstrated as unique reusable sorbent scaffolds able to efficiently remove oil from contaminated seawater even after repeated use.

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Covalently bonded three-dimensional carbon nanotube solids via boron induced nanojunctions

A system and method for design, tracking, measurement, prediction and optimization of data communications networks includes a site specific model of the physical environment, and performs a wide variety of different calculations for predicting network performance using a combination of prediction modes and measurement data based on the components used in the communications networks, the physical environment, and radio propagation characteristics.

System and method for design, tracking, measurement, prediction and optimization of data communication networks

FaSST is an RDMA-based system that provides distributed in-memory transactions with serializability and durability. Existing RDMA-based transaction processing systems use one-sided RDMA primitives for their ability to bypass the remote CPU. This design choice brings several drawbacks. First, the limited flexibility of one-sided RDMA reduces performance and increases software complexity when designing distributed data stores. Second, deep-rooted technical limitations of RDMA hardware limit scalability in large clusters. FaSST eschews one-sided RDMA for fast RPCs using two-sided unreliable datagrams, which we show drop packets extremely rarely on modern RDMA networks. This approach provides better performance, scalability, and simplicity, without requiring expensive reliability mechanisms in software. In comparison with published numbers, FaSST outperforms FaRM on the TATP benchmark by almost 2x while using close to half the hardware resources, and it outperforms DrTM+R on the SmallBank benchmark by around 1.7x without making data locality assumptions.

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FaSST: fast, scalable and simple distributed transactions with two-sided (RDMA) datagram RPCs

The present invention provides methods and devices for implementing a Low Latency Ethernet (“LLE”) solution, also referred to herein as a Data Center Ethernet (“DCE”) solution, which simplifies the connectivity of data centers and provides a high bandwidth, low latency network for carrying Ethernet and storage traffic. Some aspects of the invention involve transforming FC frames into a format suitable for transport on an Ethernet. Some preferred implementations of the invention implement multiple virtual lanes (“VLs”) in a single physical connection of a data center or similar network. Some VLs are “drop” VLs, with Ethernet-like behavior, and others are “no-drop” lanes with FC-like behavior. Some preferred implementations of the invention provide guaranteed bandwidth based on credits and VL. Active buffer management allows for both high reliability and low latency while using small frame buffers. Preferably, the rules for active buffer management are different for drop and no drop VLs.

Fibre channel over Ethernet

An enhanced general input/output communication architecture, protocol and related methods are presented.

General input/output architecture, protocol and related methods to implement flow control

A method for link-level flow control includes establishing a plurality of logical links over a physical link between a transmitting entity and a receiving entity in a network. Respective maximum limits of transmission credits are assigned to the logical links, the credits corresponding to space available to the links in a dynamically allocable portion of a receive buffer at the receiving entity, such that a sum of the maximum limits for all of the logical links corresponds to an amount of space substantially larger than a total volume of the space in the dynamically allocable portion of the receive buffer. Responsive to traffic from the transmitting entity to the receiving entity on a given one of the logical links, one or more of the credits are allocated to the given logical link when it is determined that a total of the credits allocated to the given logical link is no greater than the respective maximum limit, and that a total of the credits allocated to all of the logical links together corresponds to an allocated volume that is no greater than the total volume of the space in the dynamically allocable portion of the receive buffer. Transmission of data over the given logical link is controlled responsive to the allocated credits.

Packet communication buffering with dynamic flow control

A Network Interface (NI) includes a host interface, which is configured to receive from a host processor of a node one or more cross-channel work requests that are derived from an operation to be executed by the node. The NI includes a plurality of work queues for carrying out transport channels to one or more peer nodes over a network. The NI further includes control circuitry, which is configured to accept the cross-channel work requests via the host interface, and to execute the cross-channel work requests using the work queues by controlling an advance of at least a given work queue according to an advancing condition, which depends on a completion status of one or more other work queues, so as to carry out the operation.

Cross-channel network operation offloading for collective operations

A network interface device includes a host interface for connection to a host processor having a memory. A network interface is configured to transmit and receive data packets over a data network, which supports multiple tenant networks overlaid on the data network. Processing circuitry is configured to receive, via the host interface, a work item submitted by a virtual machine running on the host processor, and to identify, responsively to the work item, a tenant network over which the virtual machine is authorized to communicate, wherein the work item specifies a message to be sent to a tenant destination address. The processing circuitry generates, in response to the work item, a data packet containing an encapsulation header that is associated with the tenant network, and to transmit the data packet over the data network to at least one data network address corresponding to the specified tenant destination address.

Network interface controller supporting network virtualization

This paper explores the computation and communication overlap capabilities enabled by the new CORE-Direct hardware capabilities introduced in the InfiniBand Network Interface Card (NIC) ConnectX-2. We use the latency dominated nonblocking barrier algorithm in this study, and find that at 64 process count, a contiguous time slot of about 80% of the nonblocking barrier time is available for computation. This time slot increases as the number of processes participating increases. In contrast, Central Processing Unit (CPU) based implementations provide a time slot of up to 30% of the nonblocking barrier time. This bodes well for the scalability of simulations employing offloaded collective operations. These capabilities can be used to reduce the effects of system noise, and when using non-blocking collective operations may also be used to hide the effects of application load imbalance.

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Overlapping computation and communication: Barrier algorithms and ConnectX-2 CORE-Direct capabilities

A method for simulation includes establishing a network connection between first and second simulators, which are respectively configured to simulate operation of first and second devices in mutual communication over a link having a link clock. The first simulator receives an input frame sent over the network connection from the second simulator in the course of the simulated operation of the second device over multiple cycles of the link clock and processes the input data to simulate the operation of the first device so as to generate an output frame comprising output data. The first simulator then passes the output frame to the second simulator over the network connection for processing by the second simulator.

Noam Bloch

Papers

Packet communication buffering with dynamic flow control

Cross-channel network operation offloading for collective operations

Network interface controller supporting network virtualization

Overlapping computation and communication: Barrier algorithms and ConnectX-2 CORE-Direct capabilities

Co-simulation of network components