Damascene copper electroplating for on-chip interconnections, a process that we conceived and developed in the early 1990s, makes it possible to fill submicron trenches and vias with copper without creating a void or a seam and has thus proven superior to other technologies of copper deposition. We discuss here the relationship of additives in the plating bath to superfilling, the phenomenon that results in superconformal coverage, and we present a numerical model which accounts for the experimentally observed profile evolution of the plated metal.

Damascene copper electroplating for chip interconnections

Triboelectric nanogenerators (TENGs) naturally have the capability of high voltage output to breakdown gas easily Here we present a concept of triboelectric microplasma by integrating TENGs with the plasma source so that atmospheric-pressure plasma can be powered only by mechanical stimuli Four classical atmospheric-pressure microplasma sources are successfully demonstrated, including dielectric barrier discharge (DBD), atmospheric-pressure non-equilibrium plasma jets (APNP-J), corona discharge, and microspark discharge For these types of microplasma, analysis of electric characteristics, optical emission spectra, COMSOL simulation and equivalent circuit model are carried out to explain transient process of different discharge The triboelectric microplasma has been applied to patterned luminescence and surface treatment successfully as a first-step evaluation as well as to prove the system feasibility This work offers a promising, facile, portable and safe supplement to traditional plasma sources, and will enrich the diversity of plasma applications based on the reach of existing technologies

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Triboelectric microplasma powered by mechanical stimuli

Photolithographic patterning of organic materials and plasma-based transfer of photoresist patterns into other materials have been remarkably successful in enabling the production of nanometer scale devices in various industries. These processes involve exposure of highly sensitive polymeric nanostructures to energetic particle fluxes that can greatly alter surface and near-surface properties of polymers. The extension of lithographic approaches to nanoscale technology also increasingly involves organic mask patterns produced using soft lithography, block copolymer self-assembly, and extreme ultraviolet lithographic techniques. In each case, an organic film-based image is produced, which is subsequently transferred by plasma etching techniques into underlying films/substrates to produce nanoscale materials templates. The demand for nanometer scale resolution of image transfer protocols requires understanding and control of plasma/organic mask interactions to a degree that has not been achieved. For manufa...

Plasma-polymer interactions: A review of progress in understanding polymer resist mask durability during plasma etching for nanoscale fabrication

Systems, chambers, and processes are provided for controlling process defects caused by moisture contamination. The systems may provide configurations for chambers to perform multiple operations in a vacuum or controlled environment. The chambers may include configurations to provide additional processing capabilities in combination chamber designs. The methods may provide for the limiting, prevention, and correction of aging defects that may be caused as a result of etching processes performed by system tools.

Processing systems and methods for halide scavenging

Plasma is a unique medium for chemical reactions and materials preparations, which also finds its application in the current tide of nanostructure fabrication. Although plasma-assisted approaches have been long used in thin-film deposition and the top-down scheme of micro-/nanofabrication, fabrication of zero- and one-dimensional inorganic nanostructures through the bottom-up scheme is a relatively new focus of plasma application. In this article, recent plasma-assisted techniques in inorganic zero- and one-dimensional nanostructure fabrication are reviewed, which includes four categories of plasma-assisted approaches: plasma-enhanced chemical vapor deposition, thermal plasma sintering with liquid/solid feeding, thermal plasma evaporation and condensation, and plasma treatment of solids. The special effects and the advantages of plasmas on nanostructure fabrication are illustrated with examples, emphasizing on the understandings and ideas for controlling the growth, structure, and properties during plasma-assisted fabrications. This Review provides insight into the utilization of the special properties of plasmas in nanostructure fabrication.

Plasma-Assisted Approaches in Inorganic Nanostructure Fabrication

Plasma etching technologies such as reactive ion etching (RIE), isotropic etching, and ashing/plasma cleaning are the currently used booster technologies for manufacturing all silicon devices based on the scaling law. The needs-driven conversion from the wet etching process to the plasma/dry etching process is reviewed. The progress made in plasma etching technologies is described from the viewpoint of requirements for the manufacturing of devices. The critical applications of RIE, isotropic etching, and plasma ashing/cleaning to form precisely controlled profiles of high-aspect-ratio contacts (HARC), gate stacks, and shallow trench isolation (STI) in the front end of line (FEOL), and also to form precise via holes and trenches used in reliable Cu/low-k (low-dielectric-constant material) interconnects in the back end of line (BEOL) are described in detail. Some critical issues inherent to RIE processing, such as the RIE-lag effect, the notch phenomenon, and plasma-induced damage including charge-up damage are described. The basic reaction mechanisms of RIE and isotropic etching are discussed. Also, a procedure for designing the etching process, which is strongly dependent on the plasma reactor configuration, is proposed. For the more precise critical dimension (CD) control of the gate pattern for leading-edge devices, the advanced process control (APC) system is shown to be effective.

https://iopscience.iop.org/article/10.1143/JJAP.47.1435/pdf

Developments of Plasma Etching Technology for Fabricating Semiconductor Devices

We developed a fab-wide advanced process control system to control the critical dimension (CD) of gate electrode length in semiconductors. We also developed a model equation that predicts the gate CD by considering the structures of gate electrode and shallow trench isolation. This prediction model was also used to perform a factor analysis of gate CD variation. The effectiveness of the model in controlling feedforward was evaluated by both simulation and experiment. The CD variation of the wafers was improved from 8.9 nm in its 3 sigma without control to 3.5 nm with lot-to-lot feedforward control.

Gate CD Control Considering Variation of Gate and STI Structure

A hard mask material 2 such as a silicon oxide film is formed on an aluminum alloy film 3. The hard mask material 2 is patterned in the form of a thick film wiring 6, followed by etching the aluminum alloy film 3 to a given depth through the mask. A resist 5 applied to the thin film portion of the aluminum alloy film 3 is patterned in the form of a thin film wiring 7. Etching through the resist 5 and the hard mask material 2 as a mask is effected to form the thick film wiring 6 and the thin film wiring 7 in the same layer.

Nobuo Fujiwara

Papers

Developments of Plasma Etching Technology for Fabricating Semiconductor Devices

Gate CD Control Considering Variation of Gate and STI Structure

Semiconductor device having a layered wiring structure with hard mask covering

Suppression of 193-nm photoresist deformation by H2 addition to fluorocarbon plasma in via-hole etching

Control of oxidation on NiSix during etching and ashing processes