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Norio Hasegawa

Researcher at Renesas Electronics

Publications -  5
Citations -  122

Norio Hasegawa is an academic researcher from Renesas Electronics. The author has contributed to research in topics: Photomask & Integrated circuit. The author has an hindex of 5, co-authored 5 publications receiving 122 citations.

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Patent

Fabrication method of semiconductor integrated circuit device

TL;DR: In this paper, the aligning process to transfer a predetermined pattern to a semiconductor wafer by irradiating a photoresist on the semiconductor Wafer with an aligning laser beam of the modified lighting via a photomask MK was described.
Patent

Method of manufacturing integrated circuit

TL;DR: In this article, a photomask (PM1) including part of an opaque resist pattern (3a) in addition to an opaque pattern (2a) is used to transfer an integrated circuit pattern to a wafer by exposure.
Patent

Method for manufacturing semiconductor integrated circuit device, optical mask used therefor, method for manufacturing the same, and mask blanks used therefor

TL;DR: In this paper, a photo mask has been mounted on a predetermined apparatus such as, e.g., an inspection equipment or aligner, in the state in which a mounting portion of the predetermined apparatus is contacted with that region of a major surface of a mask substrate.
Patent

Method of manufacturing semiconductor integrated circuit device optical mask therefor, its manufacturing method, and mask blanks

TL;DR: In this paper, a photo mask has been mounted on a predetermined apparatus such as, e.g., an inspection equipment or aligner, in the state in which a mounting portion of the predetermined apparatus is contacted with that region of a major surface of a mask substrate.
Patent

Method of fabrication of semiconductor integrated circuit device

TL;DR: In order to shorten the time needed for fabricating semiconductor integrated circuit devices, a wafer is exposed while a chip area with defects of a mask is covered with a masking blade for light shielding.