The freeware entitled IC-EMC is a windows-based software demonstrator which aims at simulating parasitic emission and susceptibility of integrated circuits. The following paper describes the main simulation features of this tool through several examples.

IC-EMC, a demonstration freeware for predicting Electromagnetic Compatibility of integrated circuits

In recently years, high speed digital circuit equipment and products with electrostatic discharge (ESD) issues have become crucial due to tighter rise time and smaller geometry spacing. A typical ESD trouble shooting case is discussed involving a personal computer system followed with plain analysis to confirm the ESD interference path in a complex system. Further analysis studies several printed circuit board (PCB) structure traces relative to crosstalk. The target ESD immunity is then increased up from ±4kV to ±6kV contact discharge for the margin design to ensure the improved effect using a novel technique in this evaluated system. The simulation result is verified to be in good agreement with the measurement result.

Investigation of effectiveness of split image plane for ESD immunity in system level

Electromagnetic interference (EMI) issues are expected to be crucial for next-generation system-on-package (SOP) integrated high-performance digital LSIs and for radio frequency (RF) and analog circuits Ordinarily in SOPs, high-performance digital LSIs are sources of EMI, while RF and analog circuits are affected by EMI (victims) This paper describes the following aspects of EMI in SOPs: 1) die/package-level EMI; 2) substrate-level EMI; 3) electromagnetic modeling and simulation; and 4) near electromagnetic field measurement First, LSI designs are discussed with regard to radiated emission The signal-return path loop and switching current in the power/ground line are inherent sources of EMI The EMI of substrate, which work as coupling paths or unwanted antennas, is described Maintaining the return current path is an important aspect of substrate design for suppressing EMI and for maintaining signal integrity (SI) In addition, isolating and suppressing the resonance of the DC power bus in a substrate is another important design aspect for EMI and for power integrity (PI) Various electromagnetic simulation methodologies are introduced as indispensable design tools for achieving high-performance SOPs without EMI problems Measurement techniques for near electric and magnetic fields are explained, as they are necessary to confirm the appropriateness of designs and to investigate the causes of EMI problems This paper is expected to be useful in the design and development of SOPs that take EMI into consideration

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Norio Masuda

Papers

Electromagnetic interference of system on package