The effect of texture unit shape on silicon surface on the absorption properties

Effect of surface texturization on minority carrier lifetime and photovoltaic performance of monocrystalline silicon solar cell

Nanoelectronic devices are being extensively developed in these years with a large variety of potential applications. In this article, some recent developments in nanoelectronic devices, including their prin- ciples, structures and potential applications are reviewed. As nanodevices work in nanometer dimensions, they consume much less power and function much faster than conventional microelectronic devices. Nanoelectronic devices can operate in different principles so that they can be further grouped into field emission devices, molecular devices, quantum devices, etc. Nanodevices can function as sensors, diodes, transistors, photovoltaic and light emitting devices, etc. Recent advances in both theoretical simulation and fabrication technologies expedite the development process from device design to prototype demonstration. Practical applications with

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Advances in Conceptual Electronic Nanodevices based on 0D and 1D Nanomaterials

Abstract Based recombination at residual defect and impurity recombination centers is identified to be the likely cause of the 20% (AM 1) efficiency barrier in the highest efficiency silicon solar cells reported to date. To reach the 20% (AM 1) efficiency, base recombination must be further reduced by either stress-free and clean fabrication techniques on high lifetime crystals or novel base structure design, such as the graded thin-base back-surface-field structure proposed and analyzed by Sah and Lindholm. To break the 20% barrier, residual base recombination losses must be eliminated and emitter recombination must be reduced. Several novel emitter designs to reduce recombination losses have been proposed and one demonstrated. These involve the reduction of emitter interface recombination losses at the non-contact surface by high quality thermal oxide and at the metal-contact/silicon-emitter interface by either a thin tunneling oxide, as demonstrated by Green, or by a polysilicon barrier layer between the metal conductor and the silicon emitter surface. An efficiency of 23.8% (AM 1) has been estimated using Neugroschel's data on emitter interface recombination velocity and dark current density of polysilicon barrier layers. Novel floating emitter or non-contact emitter solar cell transistor structures have also been proposed by Sah and Cheng to reduce emitter recombination loss for >20% efficient silicon solar cells.

P. Mialhe

Papers

Toward a theoretical limit of solar cell efficiency with light trapping and sub-structure