Self-heating effects in silicon-on-insulator (SOI) power devices have become a serious problem when the active silicon layer thickness is reduced and buried oxide thickness is increased. Hence, if the temperature of the active region rises, the device electrical characteristics can be seriously modified in steady state and transient modes. In order to alleviate the self heating, two novel techniques which lead to a better heat flow from active silicon layer to silicon substrate through the buried oxide layer in SOI power devices are proposed. No significant changes on device electrical characteristics are expected with the inclusion of the novel techniques. The electro-thermal performance of lateral power devices including the proposed techniques is also presented.

Study of novel techniques for reducing self-heating effects in SOI power LDMOS

For the first time, lateral RF power MOSFETs have been fabricated in a silicon-on-insulator technology. Fabrication was performed on a 1.2-/spl mu/m SOI CMOS logic process using an additional p/sup -/ angle implant. The devices exhibit a breakdown voltage in excess of 35 V, a unity current gain frequency (f/sub T/) of 6.9 GHz, a maximum oscillation frequency (f/sub max/) of 10.1 GHz, a transconductance (g/sub m/) of 28 mS, and leakage currents of under 10 nA. A class A RF amplifier was also constructed and measured. It yielded an efficiency of 25% (identical to a similarly rated bulk LDMOSFET) with a maximum power output of 0.115 W. The excellent RF performance of these devices, combined with the inherent advantages of SOI CMOS for mixed-signal circuitry, is very promising for future integrated RF power amplifiers.

Lateral RF SOI power MOSFETs with f/sub T/ of 6.9 GHz

This paper presents the first results of a 1-GHz SOI RF power LDMOSFET with 115 mW of output power. A 6-W P/sub OUT/ (competitive with comparable bulk LDMOSTs) can be achieved by scaling the FET dimensions with little degradation of RF performance. Both DC and RF characteristics are presented, and model parameters are extracted. Class A amplifier results are shown to deliver a PAE of 25%, power gain of 16 dB, and 1-dB compression of 40 mW. These results are extremely encouraging for IPA development with SOI RF power LDMOSFETs.

A silicon-on-insulator 28-V RF power LDMOSFET for 1-GHz integrated power amplifier applications

Influence of tunneling barrier width on the forward current characteristics of InAs-based microwave p-n diode

In this work, the influence of top silicon thickness T/sub si/, buried oxide thickness T/sub box/ and drift doping N/sub d/ on quasi-saturation in SOI RESURF LDMOS is investigated through extensive 2-D simulations. A physical insight on quasi-saturation in SOI structures with different top silicon thickness is provided. Furthermore the influence of Self-heating effect on quasi-saturation is also presented. The quasi-saturation current increases as the decrease in top silicon thickness up to T/sub si/ 1.0 /spl mu/m with the same drift dose. Beyond this value quasi-saturation current remains unchanged with T/sub si/. The analysis shows that the saturation of carrier velocity in the drift neutral region is the main cause for higher quasi-saturation current in SOI structures with T/sub si/ less than 1.0 /spl mu/m. Under optimum RESURF condition, reducing buried oxide increases the quasi-saturation current dramatically.

Influence of physical parameters on the quasi-saturation of a power SOI RF LDMOS

This paper presents the evaluation of performance of 50 V LDMOSFETS designed in bulk Si and SOI for use in power amplifiers for cellular base stations. SOI technology has been fast emerging as the major technology for RF applications due to its inherent advantages such as lower parasitics, lower on-resistance and better noise immunity. Extensive 2-D simulations on an advanced process and device simulator have been performed to study the carrier dynamics in the LDMOSFET. This allows for a better understanding of the means to reduce the device parasitics, that are a major factor limiting the RF performance of the transistor. A simple circuit model has been developed for the LDMOSFET for use in performing large signal AC analyses for RF characterization. Non-Isothermal simulations on the SOI device have shown that at the feature dimensions under consideration, the self heating does not affect the DC and RF performance significantly.

P. Perupalli

Papers

Performance evaluation of bulk Si and SOI RF LDMOSFETs for emerging RFIC applications