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Paul Andrew Ashmore

Researcher at IBM

Publications -  29
Citations -  1021

Paul Andrew Ashmore is an academic researcher from IBM. The author has contributed to research in topics: Controller (computing) & Cache. The author has an hindex of 17, co-authored 29 publications receiving 1021 citations. Previous affiliations of Paul Andrew Ashmore include LSI Corporation.

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Patent

Raid controller using capacitor energy source to flush volatile cache data to non-volatile memory during main power outage

TL;DR: In this paper, a write-caching RAID controller includes a CPU that manages transfers of posted-write data from host computers to a volatile memory and transfers of the posted write data from the volatile memory to a redundant array of storage devices when a main power source is supplying power to the RAID controller.
Patent

Apparatus and method for performing a preemptive reconstruct of a fault-tolerant RAID array

TL;DR: A RAID controller performs a preemptive reconstruct of a redundant array of disks while it is still fault-tolerant by determining the errors by a first disk exceeded the error threshold, and reading data from a second disk, and writing the data to a spare disk as mentioned in this paper.
Patent

Cache memory arrangement and methods for use in a cache memory system

TL;DR: In this paper, a cache memory system to support re-synchronisation of non-volatile cache memories following interruption in communication is presented, where the data to be transferred represents only the transactions which were in progress at the time of the reset or failure, rather than the entire non-vatile cache contents.
Patent

Redundant storage controller system with enhanced failure analysis capability

TL;DR: In this paper, a redundant storage controller system that robustly provides failure analysis information (FAI) to an operator of the system is disclosed, which includes first and second storage controllers in communication with one another, such as via a PCI-Express link.
Patent

RAID system for performing efficient mirrored posted-write operations

TL;DR: In this paper, a bus bridge on a primary RAID controller receives user write data from a host and writes the data to its write cache and also broadcasts the data over a high speed link (e.g., PCI-Express) to a secondary RAID controller's bus bridge.