Showing papers by "Paul Jespers published in 2000"
28 May 2000
TL;DR: A complete digitally-programmable analogue fuzzy logic controller (FLC) is presented and the design of some new functional blocks and the improvement of others aim towards speed optimisation with a reasonable accuracy, as it is needed in several analogue signal processing applications.
Abstract: A complete digitally-programmable analogue fuzzy logic controller (FLC) is presented. The design of some new functional blocks and the improvement of others aim towards speed optimisation with a reasonable accuracy, as it is needed in several analogue signal processing applications. A nine-rules, two-inputs and one-output prototype was fabricated and successfully tested using a standard CMOS 2.4 /spl mu/ technology showing good agreement with the expected performances, namely: 5.26 Mflips (mega fuzzy logic inferences per second) at the pin terminal (@CL=13 pF), 933 /spl mu/W power consumption per rule (@Vdd=5V) and 5 to 6 bits of precision. Since the circuit is intended for a subsystem embedded in an application chip (@CL/spl les/15 pF) over 8 Mflips may be expected.
20 citations