A disclosed gaming machine has a plurality of “gaming peripherals,” each communicating with a master gaming controller via a standard peripheral interface such as the USB (Universal Serial Bus). Further, the gaming peripherals employ a standard peripheral controller and one or more specialized “peripheral devices” (e.g., the actual lights, bill validators, ticket printers, etc. that perform the specific functions of the gaming peripherals). Much of the hardware associated with the peripheral controller is identical from one gaming peripheral to the next. Only a portion of the peripheral controller hardware is specific to the different types of gaming peripherals.

Standard peripheral communication

An integrated circuit computing device is comprised of a dynamically configurable Field Programmable Gate Array (FPGA). This gate array is configured to implement a RISC processor and a Reconfigurable Instruction Execution Unit. Since the FPGA can be dynamically reconfigured, the Reconfigurable Instruction Execution Unit can be dynamically changed to implement complex operations in hardware rather than in time-consuming software routines. This feature allows the computing device to operate at speeds that are orders of magnitude greater than traditional RISC or CISC counterparts. In addition, the programmability of the computing device makes it very flexible and hence, ideally suited to handle a large number of very complex and different applications.

Integrated circuit computing device comprising a dynamically configurable gate array having a microprocessor and reconfigurable instruction execution means and method therefor

A disclosed player tracking unit utilizes a memory arranged to store a plurality of different communication protocols allowing the player tracking unit to communicate with a plurality of different types of gaming machines and a plurality of different types of player tracking servers The player tracking unit may contain many different types of player tracking peripheral devices such as card readers, key pads, displays, bonus buttons and biometric input mechanisms The peripheral devices contained in the player tracking unit may be accessible to the master gaming controller on a gaming machine and may be utilized by the master gaming controller for other gaming applications The player tracking unit may be designed with a standard housing and standard device layout allowing the player tracking unit to fit in many different types of gaming machines with minimal modifications to the gaming machine or the player tracking unit

Universal player tracking system

Open architecture communication systems and methods are provided that allow flexible data transmission between gaming machines and other devices and nodes within a gaming machine network. The gaming machine and other devices employ a communication interface that sends and receives data via a common communication protocol and via common communication hardware. The communication interface and common communication protocol allow data transfer between gaming machines and other network nodes such as gaming service servers, despite the presence of different proprietary gaming machine functions and proprietary communication protocols and despite the presence of various proprietary hardware and proprietary communication protocols relied on by the servers.

Open architecture communications in a gaming network

An integrated dynamically programmable gate array comprises a two dimensional array of programmable gates. These gates can be implemented as look up tables but hardwired gates with programmable interconnections are also possible. Each one of the gates receives plural input logic signals from plural other gates. Consequently, a broad range of logic combinations are possible. The gates further include locally stored multiple contexts dictating different combinatorial logic operations performed by the gates. The contexts increase the logic operations performable by the gate and the fact that the contexts are locally stored enables better integration and speed. Only a context instruction needs to be distributed among programmable gates. A context signal generator is included that generates a context signal indicating a change in an active one of the contexts. This active context dictates the logic operations of the gates that commonly receive by the signal. Since the contexts information is stored on the gate array, and specifically locally, the context signal can change as fast as every clock cycle of the programmable gate array. To increase functionality, context memory arrays, which store context programming information, are separately addressable so that a new truth table is storable in a first one of the context memory arrays while a truth table of a second one of the context memory arrays is dictating the logic operations performed by the gates. As a result, the functionality of each programmable gate can be increased by increasing the number of available functions for that programmable gate.

Dynamically programmable gate array with multiple contexts

A peripheral controller is described which is suitable for connecting a selected one of a plurality of peripheral devices to a computer system. The peripheral controller comprises programmable bidirectional line driver/receiver devices which can be operated in an input only mode, an output only mode or a bidirectional mode and which can be set into an appropriate mode by configuration control data sent from the computer system to the peripheral controller. The peripheral controller also includes a re-configurable logic array which can be configured under the control of the configuration control data to implement a particular interface required for the selected peripheral device. This increases the efficiency of use of a peripheral interface.

Peter A. Albiez

Papers

Uni and bi-directional signal transfer modes in peripheral controller and method of operating same