Showing papers by "Peter Hacke published in 2009"
07 Jun 2009
TL;DR: This paper explores the use of digital radiography and computed tomography with other diagnostics to support photovoltaic R&D and manufacturing applications.
Abstract: Explosive growth in photovoltaic markets has fueled new creative approaches that promise to cut costs and improve reliability of system components. However, market demands require rapid development of these new and innovative technologies in order to compete with more established products and capture market share. Oftentimes diagnostics that assist in R&D do not exist or have not been applied due to the innovative nature of the proposed products. Some diagnostics such as IR imaging, electroluminescence, light IV, dark IV, x-rays, and ultrasound have been employed in the past and continue to serve in development of new products, however, innovative products with new materials, unique geometries, and previously unused manufacturing processes require additional or improved test capabilities. This fast-track product development cycle requires diagnostic capabilities to provide the information that confirms the integrity of manufacturing techniques and provides the feedback that can spawn confidence in process control, reliability and performance. This paper explores the use of digital radiography and computed tomography (CT) with other diagnostics to support photovoltaic R&D and manufacturing applications.
14 citations
07 Jun 2009
TL;DR: In this paper, an improved isolation between interdigitated p and n regions on the cell rear has led to negligible shunt resistance losses, in combination with understanding of diode recombination losses, passivation, and optimization of Si material for the cell design through appropriate choice of base resistivity has lead to a greater than one percent absolute efficiency improvement over previous generation EWT cells, with best multicrystalline Si cells producing 17% conversion efficiency.
Abstract: Migration from the previous generation of Advent Solar emitter wrap-through (EWT) cells to the current technology platform based on 243 cm2 multicrystalline Si cells and monolithically interconnected cell and encapsulated modules has brought with it significant performance increases. Extraction of current from multiple contact pads distributed on the cell rear, optimization of the emitter through-holes, and reduction of through-hole lengths associated with moving to thinner silicon wafers has led to significantly reduced series resistance. Ag metallization costs are also lowered because of the reduction of grid finger lengths. Improved isolation between interdigitated p and n regions on the cell rear has lead to negligible shunt resistance losses. This, in combination with understanding of diode recombination losses, passivation, and optimization of Si material for the cell design through appropriate choice of base resistivity has lead to a greater than one percent absolute efficiency improvement over previous generation EWT cells, with best multicrystalline Si cells producing 17% conversion efficiency using the regular production processes. Additional improvements to efficiency are obtained with the implementation of texturing. These efficiency gains are further leveraged on the module level by the reduction of series resistance losses associated with the backplane interconnect design compared to conventionally interconnected front-side contacted cells.
9 citations
07 Jun 2009
TL;DR: In this article, the minority carrier lifetime was improved with D-PECVD SiNx compared to RPCVD siNx by showing that the front surface recombination velocity in the range of ∼9e4 cm/s.
Abstract: Silicon nitride deposited by direct plasma chemical vapor deposition (D-PECVD) and remote plasma chemical vapor deposition (R-PECVD) is tested in terms of minority carrier lifetime. Data shows that the minority carrier lifetime is improved with D-PECVD SiNx compared to RPCVD SiNx. Emitter wrap through (EWT) solar cell fabrication showed similar improvements in short-circuit current density Jsc and open-circuit voltage Voc. The best efficiency obtained on non-textured standard industrial multicrystalline silicon wafers is 16.9% with Jsc = 36.7 mA/cm2, Voc = 609 mV and fill factor FF = 75.4%. PC-1D fitting of the internal quantum efficiency (IQE) data shows front surface recombination velocity in the range of ∼9e4 cm/s. This efficiency can further be improved by incorporating texturing in the process steps.
2 citations