R
R. Arunkumar
Researcher at Saint Peter's University
Publications - 8
Citations - 214
R. Arunkumar is an academic researcher from Saint Peter's University. The author has contributed to research in topics: Computer science & Feature extraction. The author has an hindex of 4, co-authored 8 publications receiving 75 citations.
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Journal ArticleDOI
Intelligent Network Intrusion Prevention Feature Collection and Classification Algorithms
TL;DR: Intelligent feature selection methods and intrusion detection (ISTID) organization in webs based on neuron-genetic algorithms, intelligent software agents, genetic algorithms, particulate swarm intelligence and neural networks, rough-set are proposed.
Journal ArticleDOI
Multi-retinal disease classification by reduced deep learning features
R. Arunkumar,P. Karthigaikumar +1 more
TL;DR: The main contribution of this work is the reducing the dimension of the features required to classify the retinal disease, which enhances the process of reducing the system requirement as well as good performance.
Journal ArticleDOI
Colour image encryption based on customized neural network and DNA encoding
Sakshi Patel,V. Thanikaiselvan,Danilo Pelusi,B. Nagaraj,R. Arunkumar,Rengarajan Amirtharajan +5 more
TL;DR: The highly chaotic nature of hybrid chaos maps and neural network is combined to build a random number generator for cryptographic applications and a custom neural network with a user-defined layer transfer function is built to increase the generator’s randomness.
Proceedings ArticleDOI
Efficient and early detection of osteoporosis using trabecular region
TL;DR: A Regression Artificial Neural Network (ANN) classifier-based computer-aided diagnosis (CAD) system for accurate osteoporotic risk detection using digital calcaneus radiographic images and the proposed system has achieved the highest classification accuracy.
Proceedings ArticleDOI
GDI based area delay power efficient carry select adder
M. Soundharya,R. Arunkumar +1 more
TL;DR: Gate Diffusion Input (GDI) Technique can give less delay than this recently proposed reduced logic CSLA and an efficient adder design can be achieved through this technique.