We describe a new method for determining component values and transistor dimensions for CMOS operational amplifiers (op-amps). We observe that a wide variety of design objectives and constraints have a special form, i.e., they are posynomial functions of the design variables. As a result, the amplifier design problem can be expressed as a special form of optimization problem called geometric programming, for which very efficient global optimization methods have been developed. As a consequence we can efficiently determine globally optimal amplifier designs or globally optimal tradeoffs among competing performance measures such as power, open-loop gain, and bandwidth. Our method, therefore, yields completely automated sizing of (globally) optimal CMOS amplifiers, directly from specifications. In this paper, we apply this method to a specific widely used operational amplifier architecture, showing in detail how to formulate the design problem as a geometric program. We compute globally optimal tradeoff curves relating performance measures such as power dissipation, unity-gain bandwidth, and open-loop gain. We show how the method can he used to size robust designs, i.e., designs guaranteed to meet the specifications for a variety of process conditions and parameters.

/pdf/optimal-design-of-a-cmos-op-amp-via-geometric-programming-4thsejbwi6.pdf

Optimal design of a CMOS op-amp via geometric programming

A precision curvature-compensated switched-capacitor bandgap reference is described which uses a standard digital CMOS process and achieves temperature stability significantly lower than has previously been reported for CMOS circuits. The theoretically achievable temperature coefficient approaches 10 ppm//spl deg/C over the commercial temperature range and uses a straightforward room temperature trim procedure. Experimental data from monolithic prototype samples are presented which are consistent with theoretical predictions. The experimental prototype circuit occupies 3500 mil/SUP 2/ and dissipates 12 mW with /spl plusmn/5 V power supplies. The proposed reference is believed to be suited for use in monolithic data acquisition systems with resolutions of 10 to 12 bits.

A precision curvature-compensated CMOS bandgap reference

Circuit design techniques are described for switched-capacitor filters, modulators, rectifiers, detectors, and oscillators. The applications of these circuits in telecommunications, speech processing, and other signal-processing systems are also briefly discussed.

Switched-capacitor circuit design

Covering the essentials of analog circuit design, this book takes a unique design approach based on a MOSFET model valid for all operating regions, rather than the standard square-law model. Opening chapters focus on device modeling, integrated circuit technology, and layout, whilst later chapters go on to cover noise and mismatch, and analysis and design of the basic building blocks of analog circuits, such as current mirrors, voltage references, voltage amplifiers, and operational amplifiers. An introduction to continuous-time filters is also provided, as are the basic principles of sampled-data circuits, especially switched-capacitor circuits. The final chapter then reviews MOSFET models and describes techniques to extract design parameters. With numerous design examples and exercises also included, this is ideal for students taking analog CMOS design courses and also for circuit designers who need to shorten the design cycle.

http://www.gbv.de/dms/ilmenau/toc/621660655.PDF

CMOS Analog Design Using All-Region MOSFET Modeling

A switched-capacitor fully differential bandgap reference that uses a standard double-poly CMOS process is presented. It generates a differential reference voltage of 6.2 V with a standard deviation of about 24 mV and a typical temperature stability of 15.2 p.p.m./ degrees C over an extended temperature range from -40 to +85 degrees C. These performance results are obtained without using any trimming in mass production. The bandgap reference only occupies 730 mil/sup 2/ and dissipates 4.8 mW at+or-5-V power supplies. A measured power supply rejection of about 90 dB until 500 kHz is the best ever reported at high frequency. >

A CMOS bandgap reference for differential signal processing

A new single-chip monolithic compressed/expanded (companded) pulse-code modulation (PCM) coder/decoder (codec) is described. The associated switched-capacitor filters and reference voltage are also implemented on the chip, using a silicon-gate CMOS process. The DAC and ADC used incorporate a binary-weighted capacitor array and a string of equal-valued resistors. The circuit operators from a/spl plusmn/5 V supply and it consumes 65 mW in normal operation and 5 mW in the power-down condition. The implementation of the critical circuits in CMOS technology is discussed in detail.

R. Gregorian

Papers

An integrated single-chip PCM voice codec with filters