A Modeling Approach for Â¿Â¿ FractionalN Frequency Synthesizers Allowing Straightforward Noise Analysis

Radio transceivers relying on UWB impulse signals exhibit a strong potential for low data-rate communications at low power consumption. They are for instance specified in the IEEE 802.15.4a WPAN standard [1] to support low data rates, low power and low complexity short-range radio communications and ranging.

A 1.1nJ/b 802.15.4a-compliant fully integrated UWB transceiver in 0.13µm CMOS

An integrated fifth-order continuous-time low-pass filter for a WiMedia ultrawideband radio receiver is described in this paper. The prototype filter is realized with a passive pole at the filter input and a fourth-order leapfrog filter in which the gm-C technique with pseudodifferential transconductors is used. The transconductors do not include internal nodes, and they are designed to have a nominal 26-dB dc gain, of which process, voltage, and temperature variations are controlled by means of a negative resistance circuit. The losses of the low-dc-gain filter integrators are already taken into account in the filter synthesis. The passband edge frequency of the implemented filter is 240 MHz in order to receive multiband-orthogonal-frequency-division-multiplexing signals using the direct-conversion topology. The voltage gain of the filter can be controlled from 9 to 43 dB in the 1-dB gain steps. The filter achieves a 7.8-nVradicHz input-referred noise density, a -8-dBV out-of-band third-order intermodulation intercept point, and a +15-dBV out-of-band second-order intermodulation intercept point. The circuit uses a 1.2-V supply and has been fabricated in a modern 65-nm CMOS technology.

A 240-MHz Low-Pass Filter With Variable Gain in 65-nm CMOS for a UWB Radio Receiver

This paper describes the design of a pulse-based ultra-wideband (UWB) transmitter for wireless personal area networks (WPANs). The transmitter consists of a pulse generator, a phase-locked loop (PLL), and modulation circuitry. All of the components except the transmit antenna and the reference clock source are integrated. The pulse generator employs on-chip finite-impulse response (FIR) filtering so that the transmitted signal is compliant with the indoor FCC spectral emission limits. The frequency-multiplying PLL is included to provide a stable clock that sets the tap delays of the FIR filter. The transmitter architecture is capable of providing simultaneous binary phase shift keying (BPSK) and pulse position modulation (PPM). Implemented in a 90-nm standard digital CMOS process, the 2.83 mm2 prototype transmitter achieves a maximum pulse rate of 1.8 Gpulses/s while dissipating 227 mW from a 1-V supply. The measured jitter at the output of the PLL is 1.9 psrms and 15.1 pspp.

A Pulse-Based Ultra-Wideband Transmitter in 90-nm CMOS for WPANs

This paper presents the design and integration of a fully-integrated dual-conversion zero-IF2 CMOS transceiver for 9-band MB-OFDM UWB systems from 3.1 GHz to 8.0 GHz. The transceiver integrates all building blocks including a variable-gain wideband LNA, a single combined mixer for both RF down-conversion in RX and up-conversion in TX, a fast-settling frequency synthesizer, and IQ ADCs and DACs. Fabricated in a standard 0.18- mum CMOS process, the receiver measures maximum S11 of - 13 dB, maximum NF of 8.25 dB, in-band IIP3 of better than -13.7 dBm, and variable gain from 25.3 to 84.0 dB. IQ path gain and phase mismatches of the receiver chain are measured to be 0.8 dB and 4 deg, respectively. The transmitter achieves a minimum output P-1 dB of -8.2 dBm, sideband rejection of better than -42.2 dBc, and LO leakage of smaller than - 46.5 dBc.

A 3.1 GHz–8.0 GHz Single-Chip Transceiver for MB-OFDM UWB in 0.18- $\mu$ m CMOS Process

A fully integrated WiMedia compliant UWB transceiver supporting band groups 1 to 6 (3.168 GHz to 10.560 GHz), implemented in 0.13 μm SiGe BiCMOS technology will be presented. The transceiver is packaged in a small 40 pin 5 mm × 5 mm micro lead frame (MLF) package and includes a broadband T/R switch, RF balun and all PLL loop filter components. The receiver has a NF of 4.5 dB to 5.8 dB and a dynamic range of more than 50 dB. The transmitter meets US and international transmit mask requirements.

A Fully Integrated 14 Band, 3.1 to 10.6 GHz 0.13 μm SiGe BiCMOS UWB RF Transceiver

In this work, a highly integrated 14-band UWB transceiver is designed in a 0.13mum SiGe BiCMOS technology. The chip consumes 425mW during receive mode and 380mW during transmit mode from a split power supply of 2.4 and 1.2V. In this architecture a divide and mix approach is selected to allow the use of a single PLL with one RF VCO and one loop filter. The transmitter is designed to reduce spurious emissions to -70dBm to support Japanese and European transmit mask requirements.

R. Renninger

Papers

A Fully Integrated 14 Band, 3.1 to 10.6 GHz 0.13 μm SiGe BiCMOS UWB RF Transceiver

A Fully Integrated 14-Band 3.1-to-10.6GHz 0.13μm SiGe BiCMOS UWB RF Transceiver