IEEE transactions on computer-aided design of integrated circuits and systems : a publication of the IEEE Circuits and Systems Society

Traditional techniques for statistical analysis of rare events require a good understanding of the dependence of the outputs on the independent input variables. This can sometimes be an insurmountable challenge, especially when the dimensionality of the input variation space is high. In this paper, we present an innovative scaled sigma sampling (SSS) technique that is able to obtain an accurate quantification of the low probability tails without requiring visibility to the failure regions or their input dimensionality. SSS leverages the probability density differences produced by process sigma scale factors to uncover the nature of the population redistribution induced by the circuit. This understanding is used to construct an efficient transform for the circuit metric, one that has the same sigma scale factor dependency of the cumulative probabilities as the SPICE simulations. This transform is then used to obtain the low probability tails corresponding to the original process distribution. We present representative circuit applications to illustrate the large savings in computational costs that one can achieve with SSS and the transparency and accuracy of this approach.

Employing Scaled Sigma Sampling for Efficient Estimation of Rare Event Probabilities in the Absence of Input Domain Mapping

This paper presents a novel methodology for generating machine learning models used by an adaptive Monte Carlo analysis. The advantages of this methodology are that model generation occurs at the beginning of the analysis with no retraining required, it applies to both classification and regression models, and accuracy of the Monte Carlo analysis is not impacted by the accuracy of the model. This paper discusses the details of constructing and enhancing the machine learning model with emphasis on model training. It will then show how the model enables a Monte Carlo analysis that monitors and adapts to model mispredictions.

An Enhanced Machine Learning Model for Adaptive Monte Carlo Yield Analysis

Spiraling costs of a product revision demand that we mitigate risks to product yield due to unintended disconnects between SPICE models used for design and production silicon, and intentional process retargeting for product performance optimization. This often necessitates product robustness to about +/−4.0-sigmas or about 60 ppm. However, the computational costs of even the most advanced simulation techniques are so prohibitive for many of the large circuit design problems that one often cannot obtain visibility to circuit behavior below about 5000 ppm. In this paper, we build on the scaled sigma sampling (SSS) foundation presented earlier and develop a formalism for efficient assessment of circuit yield exposure to low probability tails, including estimation of its confidence interval and optimization of process sigma scale factors and sample sizes used for the SPICE simulations. We illustrate the efficacy of SSS through an extended suite of circuit yield estimation examples including one that investigates the yield dependencies of a normality capable metric on process shifts and multiplicity.

Rapid Assessment of Design Sensitivity to Process Excursions via Scaled Sigma Sampling

This article presents two improvements to, and a warning about a previously unrecognized issue with, statistical modeling, characterization, and simulation. We focus on mismatch, which is key for analog IC design, but the topics addressed are generic. For relative variation (i.e., % difference), we show that conventional measures have significant issues when the variation is large. We present two new measures of % difference between <inline-formula> <tex-math notation="LaTeX">$y_{2}$ </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">$y_{1}$ </tex-math></inline-formula> and show that <inline-formula> <tex-math notation="LaTeX">$100 \cdot {\mathrm {ln}} (y_{2} / y_{1})$ </tex-math></inline-formula> is the only measure that is physically correct for mismatch. We review existing, but not widely known, robust alternatives to the textbook approach to estimate standard deviation, show the limitations of these, and propose a new method that is intermediate between, and overcomes limitations of, the textbook and robust approaches. We then show how the accuracy of mismatch simulation, critical for analog IC design, is affected by “spurious correlation” between statistical samples; we are not aware that the importance of this has been recognized previously.

Ram Mooraka

Papers

Employing Scaled Sigma Sampling for Efficient Estimation of Rare Event Probabilities in the Absence of Input Domain Mapping

Rapid Assessment of Design Sensitivity to Process Excursions via Scaled Sigma Sampling