This paper reviews the state of the art of field- programmable gate array (FPGA) design methodologies with a focus on industrial control system applications. This paper starts with an overview of FPGA technology development, followed by a presentation of design methodologies, development tools and relevant CAD environments, including the use of portable hardware description languages and system level programming/design tools. They enable a holistic functional approach with the major advantage of setting up a unique modeling and evaluation environment for complete industrial electronics systems. Three main design rules are then presented. These are algorithm refinement, modularity, and systematic search for the best compromise between the control performance and the architectural constraints. An overview of contributions and limits of FPGAs is also given, followed by a short survey of FPGA-based intelligent controllers for modern industrial systems. Finally, two complete and timely case studies are presented to illustrate the benefits of an FPGA implementation when using the proposed system modeling and design methodology. These consist of the direct torque control for induction motor drives and the control of a diesel-driven synchronous stand-alone generator with the help of fuzzy logic.

/pdf/fpga-design-methodology-for-industrial-control-systems-a-2kzb7fwd0q.pdf

FPGA Design Methodology for Industrial Control Systems—A Review

A new method for grating and side lobes suppression in ultrasound images is presented. It is based on an analysis of the phase diversity at the aperture data. Two coherence factors, namely the phase coherence factor (PCF) and the sign coherence factor (SCF), are proposed to weight the coherent sum output. Different from other approaches, phase rather than amplitude information is used to perform the correction action.

Phase Coherence Imaging

This paper proposes a parallel hardware architecture for image feature detection based on the scale invariant feature transform algorithm and applied to the simultaneous localization and mapping problem. The work also proposes specific hardware optimizations considered fundamental to embed such a robotic control system on-a-chip. The proposed architecture is completely stand-alone; it reads the input data directly from a CMOS image sensor and provides the results via a field-programmable gate array coupled to an embedded processor. The results may either be used directly in an on-chip application or accessed through an Ethernet connection. The system is able to detect features up to 30 frames per second (320times240 pixels) and has accuracy similar to a PC-based implementation. The achieved system performance is at least one order of magnitude better than a PC-based solution, a result achieved by investigating the impact of several hardware-orientated optimizations on performance, area and accuracy.

http://cas.ee.ic.ac.uk/people/gac1/pubs/VanderleiTCASVT08.pdf

A Parallel Hardware Architecture for Scale and Rotation Invariant Feature Detection

A one-of-a-kind survey of the field of Reconfigurable Computing Gives a comprehensive introduction to a discipline that offers a 10X-100X acceleration of algorithms over microprocessors Discusses the impact of reconfigurable hardware on a wide range of applications: signal and image processing, network security, bioinformatics, and supercomputing Includes the history of the field as well as recent advances Includes an extensive bibliography of primary sources

Reconfigurable Computing: Accelerating Computation with Field-Programmable Gate Arrays

Reconfigurable architectures can bring unique capabilities to computational tasks. They offer the performance and energy efficiency of hardware with the flexibility of software. In some domains, they are the only way to achieve the required, real-time performance without fabricating custom integrated circuits. Their functionality can be upgraded and repaired during their operational lifecycle and specialized to the particular instance of a task. We survey the field of reconfigurable computing, providing a guide to the body-of-knowledge accumulated in architecture, compute models, tools, run-time reconfiguration, and applications.

Reconfigurable Computing Architectures

The current trend back toward hardware intensive signal processing has uncovered a relative lack of understanding of hardware signal processing architectures. Many hardware efficient algorithms exist, but these are generally not well known due to the dominance of software systems over the past quarter century. Among these algorithms is a set of shift-add algorithms collectively known as CORDIC for computing a wide range of functions including certain trigonometric, hyperbolic, linear and logarithmic functions. While there are numerous articles covering various aspects of CORDIC algorithms, very few survey more than one or two, and even fewer concentrate on implementation in FPGAs. This paper attempts to survey commonly used functions that may be accomplished using a CORDIC architecture, explain how the algorithms work, and explore implementation specific to FPGAs.

/pdf/a-survey-of-cordic-algorithms-for-fpga-based-computers-1k56lup4ip.pdf

A survey of CORDIC algorithms for FPGA based computers

Human designers have done amazing things with FPGAs. These designs challenge our assumptions about the speeds and densities acheivable by programmable hardware. But with multi-million gate designs and increasingly complex FPGA architectures is there really any place for the hand-crafted design anymore? Is there a way that CAD tools can incorporate the techniques and knowledge of designers to create high-density, high-performance implementations automatically? Or will the tools and architectures always lag the applications, thereby guaranteeing abundant job opportunities for FPGA design experts?

Ray Andraka

Papers

A survey of CORDIC algorithms for FPGA based computers

The John Henry Syndrome (panel session)(abstract only): humans vs. machines as FPGA designers