R
Richard R. Oehler
Researcher at IBM
Publications - 15
Citations - 416
Richard R. Oehler is an academic researcher from IBM. The author has contributed to research in topics: Memory controller & Node (networking). The author has an hindex of 11, co-authored 15 publications receiving 416 citations.
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Patent
Routing mechanisms in systems having multiple multi-processor clusters
TL;DR: In this paper, a multi-processor computer system is described in which address mapping, routing, and transaction identification mechanisms are provided which enable the interconnection of a plurality of multi-processors clusters, wherein the number of processors interconnected exceeds limited address, node identification and transaction tag spaces associated with each of the individual clusters.
Patent
Methods and apparatus for power management
TL;DR: In this paper, a power authority manages power usage levels in computer systems by monitoring power consumption levels and providing power consumption information to the various systems, such as power tables and power consumption graphs.
Patent
Methods and apparatus for static and dynamic power management of computer systems
TL;DR: In this paper, a power authority manages power usage levels in computer systems by monitoring power consumption levels and providing power consumption information to the various systems, such as power tables and power consumption graphs.
Patent
Memory controller for protected memory with automatic access granting capability
TL;DR: In this article, a method and apparatus for controlling access to data blocks stored by addresses in a memory and concurrently accessible by a plurality of transactions is provided, which includes the steps of receiving an address of a data block to be accessed by a first transaction, deriving from the address an access table entry corresponding to the data block where the entry includes lock data that governs access to the block, and providing the access if permitted by the lock data, or providing access if not permitted by lock data.
Patent
Transaction management in systems having multiple multi-processor clusters
TL;DR: In this paper, a multi-processor computer system is described in which address mapping, routing, and transaction identification mechanisms are provided which enable the interconnection of a plurality of multi-processors clusters, wherein the number of processors interconnected exceeds limited address, node identification and transaction tag spaces associated with each of the individual clusters.