In linear IC's fabricated in a low-voltage CMOS technology, the reduction of the dynamic range due to the dc offset and low frequency noise of the amplifiers becomes increasingly significant. Also, the achievable amplifier gain is often quite low in such a technology, since cascoding may not be a practical circuit option due to the resulting reduction of the output signal swing. In this paper, some old and some new circuit techniques are described for the compensation of the amplifier's most important nonideal effects including the noise (mainly thermal and 1/f noise), the input-referred dc offset voltage as well as the finite gain resulting in a nonideal virtual ground at the input.

Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization

Circuit design techniques are described for switched-capacitor filters, modulators, rectifiers, detectors, and oscillators. The applications of these circuits in telecommunications, speech processing, and other signal-processing systems are also briefly discussed.

Switched-capacitor circuit design

In this paper, various technological and topological considerations for the design of monolithic MOS switched-capacitor (SC) filtering systems are described. The properties of the passive and active devices typically available in depletion-load NMOS and CMOS technologies are presented as they relate to various SC peformance parameters. Layout techniques for improving specific performance parameters are also given. An overview of MOS operational-amplifier design emphasizes technological considerations in the design of high-performance SC systems. Finally, several important techniques are reviewed for maximizing dynamic range in SC circuits.

Technological design considerations for monolithic MOS switched-capacitor filtering systems

A new switched-capacitor integrator with low sensitivity to finite amplifier gain is described. The circuit is simple, requiring very little extra chip area as compared to the uncompensated integrator. It is compared with previously proposed finite gain compensated switched-capacitor integrators.

Switched-capacitor integrator with reduced sensitivity to amplifier gain

The performance of several switched-capacitor (SC) integrators is compared, and a description representation is introduced. Offset-compensated circuits which reduce the capacitance spread in very large time-constant SC integrators are presented. The theoretical equations are derived for all SC circuits and are then confirmed by simulations. >

Roubik Gregorian

Papers

High-resolution switched-capacitor D/A converter

An offset-free switched-capacitor biquad