Journal ArticleDOI
High-resolution switched-capacitor D/A converter
TLDR
In this paper, an offset-free switched-capacitor gain stage is described, which combines the gain stage with a binary weighted capacitor array, and a D/A converter is obtained.About:
This article is published in Microelectronics Journal.The article was published on 1981-03-01. It has received 42 citations till now. The article focuses on the topics: Ćuk converter & Buck–boost converter.read more
Citations
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Journal ArticleDOI
Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization
Christian Enz,Gabor C. Temes +1 more
TL;DR: In this paper, some old and new circuit techniques are described for the compensation of the amplifier's most important nonideal effects including the noise (mainly thermal and 1/f noise), the input-referred dc offset voltage as well as the finite gain.
Journal ArticleDOI
Switched-capacitor circuit design
TL;DR: Circuit design techniques are described for switched-capacitor filters, modulators, rectifiers, detectors, and oscillators for telecommunications, speech processing, and other signal-processing systems.
Proceedings ArticleDOI
Offset-compensated switched-capacitor integrators
Wing-Hung Ki,Gabor C. Temes +1 more
TL;DR: In this paper, the performance of several switched-capacitor (SC) integrators is compared and a description representation is introduced, and offset-compensated circuits which reduce the capacitance spread in very large time-constant SC integrators are presented.
Patent
Low-voltage CMOS comparator
TL;DR: In this paper, a MOS comparator which includes a capacitor connected in an electrical path between two amplification stages is described, and a switch is provided between the voltage source and the input of the second stage.
Patent
Charge redistribution analog-to-digital converter with system calibration
TL;DR: In this paper, an analog-to-digital converter calibration method for a charge redistribution analog to digital converter is presented, that includes adjusting an input offset of an input of the analog to the digital converter and adjusting a gain offset of the ADC.
References
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Journal ArticleDOI
All-MOS charge-redistribution analog-to-digital conversion techniques. II
TL;DR: This second paper describes a two-capacitor successive approximation technique which, in contrast to the first, requires considerably less die area, is inherently monotonic in the presence of capacitor ratio errors, and which operates at somewhat lower conversion rate.
Journal ArticleDOI
High-resolution A/D conversion in MOS/LSI
B. Fotouhi,David A. Hodges +1 more
TL;DR: A new successive approximation analog-to-digital conversion technique compatible with most MOS process technologies is described, which combines a string of equal value diffused resistors and a binary ratioed capacitor array in a unique circuit configuration so that 12-bit monotonicity is achieved with only 8-bit ratio-accurate circuit elements.