S
S. Di Carlo
Researcher at Polytechnic University of Turin
Publications - 74
Citations - 1197
S. Di Carlo is an academic researcher from Polytechnic University of Turin. The author has contributed to research in topics: Fault injection & Fault coverage. The author has an hindex of 20, co-authored 74 publications receiving 1106 citations. Previous affiliations of S. Di Carlo include Instituto Politécnico Nacional.
Papers
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Book ChapterDOI
Drift Correction Methods for Gas Chemical Sensors in Artificial Olfaction Systems: Techniques and Challenges
S. Di Carlo,Matteo Falasconi +1 more
TL;DR: This chapter introduces the main challenges faced when developing drift correction techniques and proposes a deep overview of state-of-the-art methodologies that have been proposed in the scientific literature trying to underlying pros and cons of these techniques.
Proceedings ArticleDOI
A watchdog processor to detect data and control flow errors
TL;DR: A watchdog processor for the MOTOROLA M68040 microprocessor is presented to protect from transient faults caused by SEUs the transmission of data between the processor and the system memory, and to ensure a correct instructions' flow, just monitoring the external bus.
Journal ArticleDOI
Increasing pattern recognition accuracy for chemical sensing by evolutionary based drift compensation
S. Di Carlo,Matteo Falasconi,Ernesto Sanchez,Alberto Scionti,Giovanni Squillero,Alberto Tonda +5 more
TL;DR: An evolutionary based adaptive drift-correction method designed to work with state-of-the-art classification systems that exploits a cutting-edge evolutionary strategy to iteratively tweak the coefficients of a linear transformation which can transparently correct raw sensors' measures thus mitigating the negative effects of the drift.
Journal ArticleDOI
Multi-level and hybrid modelling approaches for systems biology
TL;DR: Models which are both multi-level and hybrid satisfy both accuracy and capability for making a good knowledge base, making a very useful tool in computational systems biology.
Journal ArticleDOI
Software-Based Self-Test of Set-Associative Cache Memories
TL;DR: The main contribution of this work lies in the possibility of applying state-of-the-art memory test algorithms to embedded cache memories without introducing any hardware or performance overheads and guaranteeing the detection of typical faults arising in nanometer CMOS technologies.