An updated version of a 1985 tutorial paper on active filters using operational transconductance amplifiers (OTAs) is presented. The integrated circuit issues involved in active filters (using CMOS transconductance amplifiers) and the progress in this field in the last 15 years is addressed. CMOS transconductance amplifiers, nonlinearised and linearised, as well as frequency limitations and dynamic range considerations are reviewed. OTA-C filter architectures, current-mode filters, and other potential applications of transconductance amplifiers are discussed.

CMOS transconductance amplifiers, architectures and active filters: a tutorial

A design technique for low-power continuous-time filters using digital CMOS technology is presented The basic building block is a fully-balanced integrator with its unity-gain frequency determined by a small-signal transconductance and MOSFET gate capacitance Integrator excess phase shift is reduced using balanced signal paths, and open-loop gain is increased using low-voltage cascode amplifiers Two-pole bandpass and five-pole lowpass ladder filters have been implemented in a 12 /spl mu/m n-well CMOS process The lowpass prototypes provided 300 kHz-1000 kHz bias-current-tunable -3 dB bandwidth, 67 dB dynamic range with 1% total harmonic distortion (THD), and 30 /spl mu/W/pole (300 kHz bandwidth) power dissipation with a 15 V supply; the bandpass prototypes had a tunable center frequency of 300 kHz-1000 kHz, Q of 85, and power dissipation of 75 /spl mu/W/pole (525 kHz center frequency) from a 15 V supply The active filter area was 01 mm/sup 2//pole for both designs

Low-power CMOS continuous-time filters

Low voltage CMOS fully differential integrators for high frequency continuous-time filters using current-mode techniques are presented. Current mode techniques are employed to avoid the use of the floating differential pair, in order to achieve operation at lower supply voltage levels. These high frequency integrators feature good supply noise rejection and power efficiency. Simulated and experimental results are presented verifying theoretical results. An example 10 MHz, 6 pole filter fabricated in 2 /spl mu/m CMOS consumes only 0.7 mW/pole and requires only a single 3.3 V supply voltage.

Low voltage integrators for high-frequency CMOS filters using current mode techniques

This "current-amplifier cookbook" contains an extensive review of different current amplifier topologies realisable with modern CMOS integration technologies. The book derives the seldom-discussed issue of high-frequency distortion performance for all reviewed amplifier topologies, using as simple and intuitive mathematical methods as possible.

/pdf/cmos-current-amplifiers-speed-versus-nonlinearity-375pgz5rji.pdf

CMOS Current Amplifiers: Speed versus Nonlinearity

A monolithic implementation of a cryptosystem based on the Corron and Hahs (1997) scheme is hereby presented. The baseband chaotic encryption/decryption system has been designed at the transistor level and fabricated using AMI 1.2 /spl mu/m CMOS technology available through the MOSIS foundry. While the mathematical model of the Lorenz system is straightforward, its silicon implementation is not. Typical circuit design considerations need to be considered such as the system's dynamic range, internal signal processing mode and basic building blocks all with the intent to provide an optimal design. This work addresses in detail: (1) practical design considerations of the cryptosystem and (2) actual measurement results that verify theoretical findings.

/pdf/lorenz-based-chaotic-cryptosystem-a-monolithic-4527keodw6.pdf

Lorenz-based chaotic cryptosystem: a monolithic implementation

A fully differential current mode integrator circuit and its cascode variants are presented for use in low voltage, high frequency signal processing applications. It is shown that good linearity is achieved with signal levels up to the current bias, the equivalent of voltage mode rail-to-rail operation. It is also shown that low (voltage) bias levels actually improve linearity (within the strong inversion region of operation), enabling bias levels to be designed low enough for the integrators to work at 3V supply voltages. Major frequency response barriers are eliminated because the basic integrator has by design no parasitic poles, which enables the frequency of operation to scale much higher than previously practical. The design, fabrication, and characterization of a test filter demonstrated the feasibility of the approach. >

3V high-frequency current-mode filters

CMOS current-mode-filters based on a simple integrator operating in the ohmic region are presented. The highlights of this approach are their reduced power consumption and silicon area, high speed, programmability and low voltage supply. As an example, a 10.7 MHz biquadratic filter with a tunable Q.

S.L. Smith

Papers

Low voltage integrators for high-frequency CMOS filters using current mode techniques

3V high-frequency current-mode filters

Low voltage current-mode filters: high performance and limitations