: This report presents reliability prediction models for high density microcircuits including magnetic bubble and charge-coupled device memories for inclusion in MIL-HDBK-217C, 'Reliability Prediction of Electronic Equipment'. The approach in this investigation was unique in that the models were developed utilizing only early device life cycle data, since there was only limited field data available. Two separate models were developed. An additive hybrid type failure rate prediction model was formulated for Magnetic Bubble Memories and for the Charge-Coupled Memory devices it was found that the NMOS Dynamic RAM model currently in MIL-HDBK-217C, Notice 1 was applicable. Both models are presented in the standard MIL-HDBK-217C format, are relatively simple to use, and allow for refinements based on field and life test data as it becomes available. Finally the models exhibit reasonable correlation with existing field data. (Author)

http://www.dtic.mil/cgi-bin/GetTRDoc?AD=ADA090029&Location=U2&doc=GetTRDoc.pdf

Reliability Prediction Modeling of New Devices.

The invention of a number of interesting magnetic bubble domain devices for computer memory, data-flow data processing and optical image processing, has brought many new and interesting problems to the attention of physicists. These problems, in materials, particularly crystal growth, in magnetic domain dynamics, in the physics of ion implantation, in complex magnetic field calculations and in magneto-optics are reviewed and discussed. It is concluded that this is a particularly significant example of the interaction between technology and science.

http://iopscience.iop.org/article/10.1088/0034-4885/49/5/002/pdf

Magnetic bubble domain devices

This paper describes the derivation and applications of an analytical model for magnetic bubble domain propagation. A fleld-access bubble device is treated as a magnetic circuit, emphasizing fluxes rather than fields as in most previous treatments. The energy changes are calculated within the bubble domain rather than in the propagation pattern, making possible a simple analytical-graphical process for predicting device operating margins. Agreement with a large number of device experiments is shown to be good. Closed-form expressions are derived which relate the essential features of the operating margin to device geometry and bubble material magnetic properties. The application of this model to device diagnosis, optimization, and scale down is discussed.

An analytical design theory for field-access bubble domain devices

The usual reciprocity relation in magnetic reproduction is shown to be one form of a more general expression. This generalization incorporates an arbitrary tensor permeability which represents well oriented recording media. One useful alternate form of reciprocity is shown to involve only the irreversible or remanent recorded magnetization.

A generalized formula for induced magnetic flux in a playback head

In order for the magnetic bubble device technology to remain competitive with other memories higher densities are required. Our approach consists of reducing the period of the conventional permalloy devices from the 12-16μm range to the 6-8μm period range. This density allows the fabrication of a 1Mbit chip in a 1cm2area. One of the major obstacles in reducing the NiFe period in the past has been the problem of step coverage. We have developed a NiFe design which is totally planar in processing and which is capable of performing generation, swap, replication and detection. The process consists of a tri-layer deposition of AlCu/SiO 2 /NiFe and then top down masking and material removal steps in which the NiFe is ion milled and the SiO 2 and AlCu are plasma etched. The second level has been designed in such a manner that the NiFe layer provides an aid for alignment and masking for the AlCu process since the NiFe is an excellent mask for the plasma etches. In addition, the patterns are direct slice stepped from a 10X E-Beam reticle which produces minimum features of \sim1\mu m and registration to better than ±¼μm. Several 1Mbit architectural organizations such as 1×1Mbit, 2×512Kbit and 4×256Kbit will be compared from a performance point of view.

Design and fabrication of large capacity bubble memory devices (invited)

A 300 kbit bubble memory chip has been designed based on 3 μm bubble technology. Nominal circuit period is 14 μm and chip size is 9.8 mm×9.6 mm. A gap‐tolerant design is fully employed, such as, asymmetric half‐disk propagation pattern, half‐disk transfer gate, a novel asymmetric‐chevron stretcher, etc. The chip is fabricated using a new planar process solving step‐coverage problems to achieve good process yield. A typical bias field margin of 18 Oe is obtained at 55 Oe with a triangular wave drive.

A 300 kbit bubble memory chip with planar structure

A new design concept for 8 μm period bubble memory devices is proposed. Pattern periods and sizes in function designs are increased, keeping the storage cell size 8 μm × 8 μm. This can relax spacial restrictions for the function pattern designs and is remarkably effective in maintaining low drive fields for the functions. Chip organizations which match this function design are discussed and a 256 kbit 8 μm period chip organized with block replicate gates and true swap gates has been designed. The characteristics obtained for the drive field, replicate phase margin, swap current margin, etc., are as good as those of 16 μm period 3 μm bubble devices. A chip organization of a 1 megabit device with a short access time is also proposed.

An 8 &#181;m period bubble memory device with relaxed function designs

We have developed a 4 μm period permalloy bubble propagation track, after confirming wide gap tolerance of an 8 μm period wide gap pattern reported by Bobeck et al. From the results obtained in the design and fabrication optimization of a 4 μm period permalloy track, good performance has been obtained with the following conditions: 1.3 μm bubbles, a pattern design with a wide "leg" and an "arm" of moderate length, permalloy film thickness of 3000 A, appropriate crystal orientation and direction of DC in-plane holding field, ion implantation for hard-bubble suppression with 5 × 1013Ne+/cm2at 50 keV, and garnet-to-permalloy spacing of 1600 A. Using these conditions, a 30 kbit chip has been designed and tested. Dual spacing has been introduced for chip fabrication. The major line propagation and the function operations characterized with 100 kHz triangular wave drive are found to have good performance almost the same as that of our 1 megabit device. The overall bias margin range of 20 Oe at a drive field of 65 Oe with 100 kHz triangular wave has been obtained with 10 consecutive pages.

Design and characteristics for a 4 &#181;m period permalloy bubble device

A 10-kbit bubble memory chip has been designed and fabricated. Testing was accomplished using a new diagnostic test system, which can drive the bubble chip at two different speeds with bias fields switched synchronously with the bubble propagation. Bias margins of the fabricated chips were analyzed and it was confirmed that a sufficient bias-margin window could be assured in long-term operation.

Diagnostic testing of a 10-kbit bubble memory chip

Considerable degradation of the bias threshold ranging from 0.2 to 0.6 Oe/decade in its collapse side was found in the long-term testing of 3 μm bubble 80 kbit memory chips using (YEuYbCa) 3 (FeGe) 5 O 12 films. Investigating this problem in all its aspects, it was concluded that this margin degradation was caused by the fluctuation of the bias threshold, which closely corresponded to the fluctuation in the collapse field of bubbles statically trapped under the permalloy bars. To clarify the cause of this fluctuation, the permalloy film, the garnet film ion-implanted layer etc. were investigated, and it was found that this fluctuation depended on the garnet film thickness, the garnet film composition and on the arrangement of the surrounding permalloy patterns. The instability of the in-plane domains in the ion-implanted layers was proposed as a possible explanation of this fluctuation. Satisfactory results were obtained in long-term operation of the 80 kbit chips fabricated using the (YEuYbCa) 3 (FeGe) 5 O 12 and (YSmLuCa) 3 (FeGe) 5 O 12 films with the increased thickness of 3.4 to 3.6 μm, and it was found that the (YSmLuCa) 3 (FeGe) 5 O 12 films exhibited better characteristics compared to (YEuYbCa) 3 (FeGe) 5 O 12 films.

S. Orihara

Papers

A 300 kbit bubble memory chip with planar structure

An 8 µm period bubble memory device with relaxed function designs

Design and characteristics for a 4 µm period permalloy bubble device

Diagnostic testing of a 10-kbit bubble memory chip

Margin degradation in the long-term testing of 3 µm bubble devices

S. Orihara

Papers

A 300 kbit bubble memory chip with planar structure

An 8 &#181;m period bubble memory device with relaxed function designs

Design and characteristics for a 4 &#181;m period permalloy bubble device

Diagnostic testing of a 10-kbit bubble memory chip

Margin degradation in the long-term testing of 3 &#181;m bubble devices

An 8 µm period bubble memory device with relaxed function designs

Design and characteristics for a 4 µm period permalloy bubble device

Margin degradation in the long-term testing of 3 µm bubble devices